What you are describing is a tri-state Class-D amplifier where the output can be switched positive, negative or neither. Typically these are only used for low-fidelity low-power applications like the speaker in a mobile phone. The reason for this is that when no sound is being played, no output transistors are on so the amplifier uses very little power. The downside is like you say, small signals become badly distorted. Not much of an issue for the speaker in a mobile phone because the quality is already bad.
Hi-Fi applications Class-D amplifiers will typically use continuous switching. That is when there is no signal present the output transistors will switch continually at the switching frequency, 50% duty cycle which achieves an output that is halfway between the positive supply rail and the negative supply rail, with a sinusoidal signal at the ultrasonic switching frequency which is then filtered out with a lowpass filter. Therefore it will have no problem changing to 50.0000000001% or 49.99999999999% duty cycle to represent a very small signal since there is no minimum 'step' in adjusting the timing of the output transistors, the timing is inherently analogue. The problem only arises when it tries to produce a really big signal that requires voltages near to the negative rail (duty cycle = 0%, low side transistor always on, high side always off) or near to the positive rail (duty cycle = 100%, low side always off, high side always on), so there may be an artificial limit at 10% and 90% or something like that just to limit the minimum on/off time for the output transistors.
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TMM, you are mistaken and miss the point. PWM transforms level into time. As maximum level is finite, so is modulation period. The principal short-coming of Class-D comes up, when minimum level is considered, Jan. With Class-A/B, transmission of minimum level is only impaired by a superimposed noise. Even if that noise is hi, we can still listen one Bel or two down into it, just like we detect an old radio tune thru the noise in a full train. But a Class-D amp ignores everything belo a certain threshold, which may measure THD+N fine but is a human scandal.
How can that be? Minimum signal is 50% duty cycle so in the middle of the range.
Jan
Can you not read also older messages in this thread and investigate for yourself and not ask me a dishonest question, which is only meant as a smoke-screen? I do not think, you were dumb. This is DIYaudio, and tho I admit to have financial interest in electro-acoustics, it is not the place to defend short-comings of the mainstream industry. But rather to show them. Because mainstream is bad, I prefer quality over quantity.
You are way out of line with your personal insults.
Stick to the facts. You are wrong. Zero output on a class D is at 50% duty cycle. Max and min output at max and min duty cycle. This is basic.
Jan
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But earlier in this thread I wrote the following:
Simulations hint, that current thru and on-time of power actors would each go with the square root of level.
You are missing the point that 'minimum' and 'maximum' are actually the negative and positive power supply rails of the amplifier - only ever achieved for the largest possible signals the amplifier can produce. When the amplifier is idle or producing a small signal the duty cycle of all transistors are near 50%. None of them are required to be on/off for a small period to produce a small audio signal. A Class-D doesn't 'ignore' anything. The input stage is basically identical to Class A/AB.
Hi-Fi Class-D (maximum signal amplitude)
Tri-state 'Lo-Fi' Class-D (maximum signal amplitude)
Now imagine that the signal is just staying somewhere near zero (the middle); the Hi-Fi Class-D maintains around 50% while the Tri-state is mostly off with only short pulses going positive and negative.
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TMM, PWM output signal reveals too few. Altho duty cycle is 1/1 in idle state, push and pull power transistors do not alternatively pump maximum current thru the circuit but stay power-wisely inactive. We have to look at power flow.
Power is voltage times current. Each power transistor transmits current only when ON, with only a neglible potential over it, for this makes Class-D so efficient. Hence voltage is fixed, rail/2. But current depends on output filter and is assembled from two transistors and two diodes. These currents may be anything from zero to maximum, and there are times, when potential over a transistor is in ON state, yet there is no current flowing thru this transistor, as shown in the first paragraph.
So you see, how hard it is to positively prove my point, that Class-D has a principal disadvantage. (It has two, least bit and fixed bandwidth, just like any other digital system.)
Power is voltage times current. Each power transistor transmits current only when ON, with only a neglible potential over it, for this makes Class-D so efficient. Hence voltage is fixed, rail/2. But current depends on output filter and is assembled from two transistors and two diodes. These currents may be anything from zero to maximum, and there are times, when potential over a transistor is in ON state, yet there is no current flowing thru this transistor, as shown in the first paragraph.
So you see, how hard it is to positively prove my point, that Class-D has a principal disadvantage. (It has two, least bit and fixed bandwidth, just like any other digital system.)
Maybe it will help to realize that class-D is not a digital system. It is an analog system, and the time/voltage resolution is only limited by the noise. If there was no noise, the resolution of the duty cycle and output voltage would be infinitely small. Just like a class A/B or A. There are no 'bits'.
The reason it is so hard to prove your point is because your point is incorrect.
Jan
Class-D is digital. First, it is time-discrete, say it samples; one modulation period makes one sample, for within this period there is only one level value encoded. Second, it is level-discrete, because it internally transforms level into time, smallest level shortest ON time, but minimum ON time is limited by inertia, hence no level below its equivalent of minimum ON time can pass.
The input signal varies continuously, and the duty cycle varies continuously. Purely analog. It is indeed a sampled system, but that does NOT make it digital at all!
In a digital system (can't believe I am having to explain what digital is !) there is a VALUE, a NUMBER that represents voltage or current. That value or number can only change in discrete steps, so the resolution depends on the number of bits available and the total range, i.e. the LSB.
Nothing of the sort happens in class-D. Again, the input signal is continuous, the duty cycle varies continuously, the output signal varies continuously. The limit to how small or fine each change can be depends on the noise floor, unlike in a digital system, where the resolution depends on the least significant bit value.
Please, before immediately responding with how YOU see it, try at least to read this and absorb it. It is not as you see it. Google is your friend. You owe it to yourself.
Edit: it would help if you would try to answer to yourself: if it is digital, then what is the smallest step change?
Jan
I thought that if you take discrete samples its at least partly digital? Doesn't the switching frequency relate to the sample rate which implies a digital signal even if the pulse widths are not discrete. Actually I don't know how the pulse widths are generated but I can't believe it's analogue in all class D amps when PWM is so much easier to do digitally.
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