Hi all,
Im having problems getting my DAC (DIR1703, PCM1730) working with 96Khz sampling rates.
It works perfectly with 44100 and 48000, but at anything above 48000, i get a no signal indicator from the DIR1703.
The DIR170 is running in PLL mode, 256fs, using a 12.288Mhz crystal.
According to the DIR1703, this setup in PLL mode should have no problem syncing to a 96Khz signal.
Anyone have any ideas as to why i should have problem with this?
Details on my DAC are here:
http://www.overclockers.com.au/~mwp/dac3
Thanks.
Im having problems getting my DAC (DIR1703, PCM1730) working with 96Khz sampling rates.
It works perfectly with 44100 and 48000, but at anything above 48000, i get a no signal indicator from the DIR1703.
The DIR170 is running in PLL mode, 256fs, using a 12.288Mhz crystal.
According to the DIR1703, this setup in PLL mode should have no problem syncing to a 96Khz signal.
Anyone have any ideas as to why i should have problem with this?
Details on my DAC are here:
http://www.overclockers.com.au/~mwp/dac3
Thanks.
How do you precondition the S/PDIF signal? It is possible that a marginal input circuit works at 48kHz but not at 96kHz.
Hmmm.
Well its optical out from a soundcard (Envy24HT) -> Toslink Recv -> DIR1703.
Not much inbetween.
Well its optical out from a soundcard (Envy24HT) -> Toslink Recv -> DIR1703.
Not much inbetween.
mwp
qoute from the dir1703 data sheet:
if CKSEL is connected to UNLOCK which indicates the S/PDIF decoding status and the PLL2 lock state, the system clock can be selected automatically when the S/PDIF signal is active and the bit rate is detected.
from what i see from the diagram on your web site this is not the case. (i may be well of base but i hope it helps)
qoute from the dir1703 data sheet:
if CKSEL is connected to UNLOCK which indicates the S/PDIF decoding status and the PLL2 lock state, the system clock can be selected automatically when the S/PDIF signal is active and the bit rate is detected.
from what i see from the diagram on your web site this is not the case. (i may be well of base but i hope it helps)
Is your crystal enough fast?
I already saw some DACs that their max Hz and bytes depended also on the clock.
I already saw some DACs that their max Hz and bytes depended also on the clock.
mark stones said:mwp
qoute from the dir1703 data sheet:
if CKSEL is connected to UNLOCK which indicates the S/PDIF decoding status and the PLL2 lock state, the system clock can be selected automatically when the S/PDIF signal is active and the bit rate is detected.
Thanks for the sugestion, but after a quick check, CKSEL grounded means it always in PLL2 sync mode.
You are useing scko to the dac try it at 128fs as table 3 in the data sheet
Yeh, i might give that a try.
Im thinking it wont help though, as the setup im using accoring to the table should be fine at 96khz @ 256fs.
I pulled the TOSLINK recv & trans out of $30 COAX->TOSLINK converters... i wonder if they are cheap units that cant handle 96khz.
MWP said:
Thanks for the sugestion, but after a quick check, CKSEL grounded means it always in PLL2 sync mode.
As you have pointed out it is probably your toshlink (how does the signal look on a scope).
sorry I realised after I had posted that if you are not getting the lock signal then sync mode wont help.
44.1KHz with 12.288MHz crystal ?
MWP,
How is it possible to get a sampling rate of 44.1KHz with a 12.288MHz crystal ? I am looking at page 8, table 3 of the DIR1703 datasheet where 12.288MHz is not a crystal oscillator frequency that selects the 44.1KHz sampling rate....
MWP,
How is it possible to get a sampling rate of 44.1KHz with a 12.288MHz crystal ? I am looking at page 8, table 3 of the DIR1703 datasheet where 12.288MHz is not a crystal oscillator frequency that selects the 44.1KHz sampling rate....
Re: 44.1KHz with 12.288MHz crystal ?
Its possible to get any frequency when using pll sync mode.
rlim said:MWP,
How is it possible to get a sampling rate of 44.1KHz with a 12.288MHz crystal ? I am looking at page 8, table 3 of the DIR1703 datasheet where 12.288MHz is not a crystal oscillator frequency that selects the 44.1KHz sampling rate....
Its possible to get any frequency when using pll sync mode.
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