And what about seperate DACs for positive & negative halfwaves ?
I read about that, crossover distortion will be reduced.
My Technics has got 4 x PCM61 And I think it's for that purpose.
I read about that, crossover distortion will be reduced.
My Technics has got 4 x PCM61 And I think it's for that purpose.
rfbrw said:
These two links (site is in Russian) should get you going.
http://www.zeuslab.newmail.ru/shiftreg.htm
http://www.zeuslab.newmail.ru/images/i2s_2.jpg
THanks, are you sure that converts 16bit for 20 bit DAC ?
Is there a way to translate the website ?
Something is written about PCM56 which is 16 bit so I guess it just splits for 16bit mono DACs.
It exists some application note to connect PCM56 to SAA7220 which means I2S too.
till said:I have not really DSP phobia, i think DSP is the way to go, as it would make it possible to have a) balanced DACs, b) separate DACs for each speaker system, thus no crossover in the analog domain needed.
Oi vey !! Here you go with the DSP again. Splitting or reformatting serial data is a logical operation. A DSP chips raison d'etre is its arithmetical capability. For splitting and reformatting data, a MAC or a barrel shifter is wasted. Logical operations are far better suited to programmable logic.
but your logic will not do some digital filtering at the same time for high/low pass so i can use one chain ---> DSP/low ---> balanced DAC---> lower power amp---> woofer and one chain same DSP/high ---> other balanced DAC ---> high power amp ---> tweeter
the splitting and formatting output data to the DACs would be a task the DSP does in addition without afford to his main job, the crossover functionality.
I would need only the Transport, the DSP driving 4 DACs with 4 D1 stages direct driving 4 monoblocks sitting near to the 2way speakers. Lean system.
the splitting and formatting output data to the DACs would be a task the DSP does in addition without afford to his main job, the crossover functionality.
I would need only the Transport, the DSP driving 4 DACs with 4 D1 stages direct driving 4 monoblocks sitting near to the 2way speakers. Lean system.
The diagram I2S_2.jpg will cover all possibilties with the aid of jumpered links.Bernhard said:
THanks, are you sure that converts 16bit for 20 bit DAC ?
The second HC595 based design will do for the PCM61 if you set the CS8412 to LSB justified 18bit data i.e. Mode 6. As regards the PCM63, it will also work with the CS8411 and the AD1892 and any other DIR that can be set to output LSB justified 20bit data.
My own preference would be for the CS8412 in mode 5 and the I2S_2 schematic.
till said:but your logic will not do some digital filtering at the same time for high/low pass so i can use one chain ---> DSP/low ---> balanced DAC---> lower power amp---> woofer and one chain same DSP/high ---> other balanced DAC ---> high power amp ---> tweeter
You are not very familiar with FPGA's are you? or DSP's for that matter.
i´m not, how should i. I´m not professional in electronics. You do programm a digital high/low pass in a fpga?
Well I've never had to but that is not the point. It is unwise to adopt a dogmatic position on a topic without first gathering all the relevant information.
oh no, there may be unlimited theorethical possibilitys to build digital filters. If you want with 74xxx ....
The only way i would do is in software using a fast enough processor. Its better to develop and test with software than in hardware. Takes 2 seconds to load new code into the flash and try again.
The only way i would do is in software using a fast enough processor. Its better to develop and test with software than in hardware. Takes 2 seconds to load new code into the flash and try again.
till said:oh no, there may be unlimited theorethical possibilitys to build digital filters. If you want with 74xxx ....
The only way i would do is in software using a fast enough processor. Its better to develop and test with software than in hardware. Takes 2 seconds to load new code into the flash and try again.
What makes you think programmable logic is any different?
because as i understand you have a chip you put in a programmer, load your code into it, take it away from programmer, put into your circuit, test, fail, take next chip, put into programmer...
I consider a processor more universal for different projects, and nobody donates me the necessary development tools for fpga. Also i like DIP packages and hope in near future there will be fast enough dsPICs i can programm with cheap diy hardware, recive as sample from microchip, and can handle because DIP40 package.
I consider a processor more universal for different projects, and nobody donates me the necessary development tools for fpga. Also i like DIP packages and hope in near future there will be fast enough dsPICs i can programm with cheap diy hardware, recive as sample from microchip, and can handle because DIP40 package.
rfbrw said:
The diagram I2S_2.jpg will cover all possibilties with the aid of jumpered links.
My own preference would be for the CS8412 in mode 5 and the I2S_2 schematic.
And how do I know about the jumper settings ?
till said:because as i understand you have a chip you put in a programmer, load your code into it, take it away from programmer, put into your circuit, test, fail, take next chip, put into programmer...
How very strange. I seem to be communicating with someone still in the 1980's.
and nobody donates me the necessary development tools for fpga.
If you mean no one knocks on your door and says "A free full development package from Alterlinx FPGA Plc. just for you, sir" then probably not. You have to at least make the effort to find out whats available. And all the main players offer free tools.
Also i like DIP packages and hope in near future there will be fast enough dsPICs i can programm with cheap diy hardware, recive as sample from microchip, and can handle because DIP40 package.
Enjoy it while it lasts. As the dies shrink and the devices get faster the package itself becomes a key factor in attaining maximum speed. Better start getting used to packages like MLP LQFP TQFP mBGA.....
Bernhard said:
My idea:
16bit DAC have 1 LSB linearity error.
20bit dac have 1 LSB linearity error. I hope so![]()
Every stage of the 20bit DAC need to be as accurate so that this 1 LSB can be achieved.
So if it is fed with 16 + 4 empty bit data, linearity error will be strongly reduced.
No oversampling, no interpolation, no risk of loss, compared to real 20bit.
The resolution of the DAC doesn't tell anything of the linearity. Just as Till mentioned a 16 bit DAC can have the same resolution on the first 16 bit.
for example The PCM1704(24bit) is basicly a PCM1702(20bit) wich accepts 24bit input.
The linearity is the same.
Bernhard said:And what about seperate DACs for positive & negative halfwaves ?
I read about that, crossover distortion will be reduced.
My Technics has got 4 x PCM61 And I think it's for that purpose.
You can get rid of the crossover distortion by using sperate DAC for each halfwave.
E.g. PCM1702 internally have two 19bit DAC's for this porpuose.
/Lennart
rfbrw said:My own preference would be for the CS8412 in mode 5 and the I2S_2 schematic.
Beware. The circuit in I2S_2.jpg would need some alteration to work with mode 5 and a 18/20bit dac.
Originally posted by Bernhard
And how do I know about the jumper settings ?
The chip datasheets. What the links do stems from what the chips do.
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