Greetings,
At me all opens. http://images4.fotki.com/v48/free/491d4/6/67485/270142/DAC_TDA1541A_-or.jpg
At me all opens. http://images4.fotki.com/v48/free/491d4/6/67485/270142/DAC_TDA1541A_-or.jpg
If it's your web page probably you have the authorization to see it.
I have not...
Cheers
Andrea
I have not...

Cheers
Andrea
URL problem.
Hi,
I could not open the page. But do a refresh and it opens up.
I tried it three times. Each time it would not open--- ' access denied ' but when I hit refresh the page opens up !! Try it.
Cheers.
Ashok.
Hi,
I could not open the page. But do a refresh and it opens up.
I tried it three times. Each time it would not open--- ' access denied ' but when I hit refresh the page opens up !! Try it.
Cheers.
Ashok.
4517
Guido, dump the 4517. Like all 4000 series logic, it is too slow to be useful for digital audio applications. For an alternative, consider the Philips 74HC7731; a quad 64-bit static shift reg. It’s good to 100 MHz. It doesn’t have a 32-bit tap but you can get an effective 32-bit length by doubling the clock.
Guido, dump the 4517. Like all 4000 series logic, it is too slow to be useful for digital audio applications. For an alternative, consider the Philips 74HC7731; a quad 64-bit static shift reg. It’s good to 100 MHz. It doesn’t have a 32-bit tap but you can get an effective 32-bit length by doubling the clock.
Like Guido I too have used the 4517 for something pretty similar and have had no problems. The 4517 is rated at 5MHz at 5volts double that at 10volts. Speed for speeds sake just creates more noise.
ray.
ray.
Re: 4517
Eh, it's is working! It is fast enough if you split non-os I2S, as i have stated before. Since i use the GAL to clock things in half a clockpulse later, i have no problems with the 4517 being (a bit) slow.
With oversampled I2S from a 7220, the clockfreq would double (NOT 4 times, the wordlength is halve of the 7210 output) and the 4517 would not cope.
A warning, i have tested several 4517's and only the philips one was fast enough! Other brands were not, but that were old
devices from the local electronics shop.
The digital part is working fine, i'm looking at the analog part at the moment. More difficult for me than digital.....
Regards,
GuidoB
Ulas said:Guido, dump the 4517. Like all 4000 series logic, it is too slow to be useful for digital audio applications. For an alternative, consider the Philips 74HC7731; a quad 64-bit static shift reg. It’s good to 100 MHz. It doesn’t have a 32-bit tap but you can get an effective 32-bit length by doubling the clock.
Eh, it's is working! It is fast enough if you split non-os I2S, as i have stated before. Since i use the GAL to clock things in half a clockpulse later, i have no problems with the 4517 being (a bit) slow.
With oversampled I2S from a 7220, the clockfreq would double (NOT 4 times, the wordlength is halve of the 7210 output) and the 4517 would not cope.
A warning, i have tested several 4517's and only the philips one was fast enough! Other brands were not, but that were old
devices from the local electronics shop.
The digital part is working fine, i'm looking at the analog part at the moment. More difficult for me than digital.....
Regards,
GuidoB
Re: 4517
How do you load the data at a rate faster than the arrival rate of the data?
Ulas said:It doesn’t have a 32-bit tap but you can get an effective 32-bit length by doubling the clock.
How do you load the data at a rate faster than the arrival rate of the data?
According to the TI data sheet I saw, the 4517 is guaranteed to only 3 MHz at 25C and 5v. Using it with a 2.8 MHz data stream doesn’t leave much margin. The fact that Guido has to qualify individual parts proves, IMO, his design is operating at the margin.
If the data arrives at rate T and the shift reg is clocked at rate 2T, every other stage in the reg will contain good data. The alternate stages will contain ??? (Who cares.) You recover the data by clocking the output of the reg at rate T.
If the data arrives at rate T and the shift reg is clocked at rate 2T, every other stage in the reg will contain good data. The alternate stages will contain ??? (Who cares.) You recover the data by clocking the output of the reg at rate T.
Ulas said:According to the TI data sheet I saw, the 4517 is guaranteed to only 3 MHz at 25C and 5v. Using it with a 2.8 MHz data stream doesn’t leave much margin. The fact that Guido has to qualify individual parts proves, IMO, his design is operating at the margin.
If the data arrives at rate T and the shift reg is clocked at rate 2T, every other stage in the reg will contain good data. The alternate stages will contain ??? (Who cares.) You recover the data by clocking the output of the reg at rate T.
Well, I'm using Motorola and Philips devices and generally try to avoid 'don't cares' but that is just a preference. In my case the 2T option would also need the dreaded gated clock.
ray
Ulas said:According to the TI data sheet I saw, the 4517 is guaranteed to only 3 MHz at 25C and 5v. Using it with a 2.8 MHz data stream doesn’t leave much margin. The fact that Guido has to qualify individual parts proves, IMO, his design is operating at the margin.
If the data arrives at rate T and the shift reg is clocked at rate 2T, every other stage in the reg will contain good data. The alternate stages will contain ??? (Who cares.) You recover the data by clocking the output of the reg at rate T.
The Philips HEF4517B is 5MHz typical at 5V. Min is 2MHz, so you might get a bad one. But generally it should be ok all the time.
So don't use TI, use Philips.
The '7731 has also only one clock, for clocking in and out. So clocking in at 2T and out at T is impossible. The next stage clocking in at T is probably what you have in mind. But you need two of those '7731's.
In the prototype i used lots of 8 bit 74' something registers. That also worked and those chips are faster also.
GuidoB
I was working on a new GAL but could not get anyting working.
In the end i read the jedec file out of the working GAL and decompiled it into equasions...
Then i saw that the defenition for fiforead was not according to the equasions i was using
Seems my 'reference' file was not the one loaded into the GAL
Anyway, corrected the fault and all is working well. Fiforead definition in post 16 here (GAL listing) is WRONG
Fiforead definition in 15 (explanation) is the working one!! 🙂
As you might have read in another post here, the GAL content for the DATAR and DATAL definition is
and can be done much simpler. I'm working on that at the moment, have some addition i wanna test 😀 ...and it is no longer N-OS
To Be Continued....
In the end i read the jedec file out of the working GAL and decompiled it into equasions...
Then i saw that the defenition for fiforead was not according to the equasions i was using

Seems my 'reference' file was not the one loaded into the GAL

Anyway, corrected the fault and all is working well. Fiforead definition in post 16 here (GAL listing) is WRONG

Fiforead definition in 15 (explanation) is the working one!! 🙂
As you might have read in another post here, the GAL content for the DATAR and DATAL definition is



To Be Continued....
I asked my digital electronic teacher today,
His answear was that, compared to the resolution of the analog stage after, it's negligible
And if I still want to correct this, an easy solution would be to use an IC called additionner (I'm not sure of the translation)
His answear was that, compared to the resolution of the analog stage after, it's negligible
And if I still want to correct this, an easy solution would be to use an IC called additionner (I'm not sure of the translation)
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