How to beautifully photograph silicon chips in DIY style?

Many of us have a stereo microscope for soldering SMD, and the first idea comes to use that to inspect silicon chips and transistors to make sure it is not fake and the same version of what you are looking for. However, the result is always awful, and how can I see now, the reason is a coaxial light option which is unavoidable and needed to get perfect pics of silicon. The magnification factor nearly doesn't matter, my stereo Nikon SMZ660 has 300x max but still sucks due to LEDs light falling with not 90 degrees - glossy reflections ruining the picture contrast.
So, Is there any chance to get nice pics without $5000 Zeiss metallurgical microscope? Hell yeah, quite compact and within $100! First I bought a used VSZ-0530CO Japanese precision optical zoom device $53(with 12V coax LED!), it is a machine vision element massively used in China to control production parameters and measure dimensions. Vital Vision Technology promises a good resolution(4um) and minimal geometric distortions(.001) for the device, you need just add the C-mount CMOS camera 1/1.8"(from $30 for a secondhand) and 160mm RMS standard 4X lens aka objective(I paid $8 for used Canadian Motic EF plan 4X/0.1) with a thread adapter($4). The small like a book table + holder cost me $15, that's it. Check this out:

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Low phase-noise EPSON_SG-210STF oscillator chip.
EPSON_SG-210STF.jpg

BC856B
BC856B.jpg

AD8397 is a bit dirty with the residual plastic on the silicon.
300x.jpg

Ti ISO7240
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OPA1612 has such a tiny marking, the symbol's thickness is 4um, and the minimal visible elements are 1.5um. That pic taken with Motic 40X lens.

OPA1612_internal_marking.jpg

And a short video 30fps 400X, to see how that looks online.
 

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What did you use to get the plastic mould compound off? Hot nitric acid?

The black "shield" on the OPA1612 is probably a stress relief coating. Without it the stresses from packaging wrecks the DC offset.

The picture of the OPA1612 in the first post looks like density or fill structures.

Tom
 
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I burned the plastic on the kitchen propane fire. No extra cleaning only a soft eraser. Some chips are clear enough after that, but some still need extra cleaning. As I remember from the NXP report(we had the case when 20K mosfets were returned), the plastic compound was resolved with hot H2SO4.
BTW, I found a similar optical device from the same Japanese company with specified resolution and distortions but with no zoom, just fixed optical mag-ratio. I see that pipe with the coax-LED cost is ridiculously cheap 50RMB i.e. $7.. I have no doubt it should work too.
d5e7c11d95fb98c286db32da6078ac0.jpg
 
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Ti NE5532 is a tiny die .7x.7mm
Actually, 700x700 um for a simple opamp like that is kinda large. But then again, it's probably limited in size by the bond pads. At some point the signal does need to come off the chip... 🙂

I'm puzzled by the round structures near the bottom. ESD diodes?

Is this the shield you're talking about?

Screenshot 2024-07-02 at 10.25.58.png


It looks patterned to me. I.e., it was part of the manufacturing of the die and not something done in packaging. Anti-stress coatings are applied after the device is bonded to the lead frame but before the moulding is done as far as I understand it. There's no patterning. It's just a dollop of some goop that ensures that the granules of plastic in the mould compound don't slam directly into the die.

I suppose it's possible that the underlying structures caused the shield to adhere differently in different areas of the chip, thereby creating the patterning, but it sure looks like it was designed to have a specific shape. It almost looks like the top layer of metal was used to create a shield. I rather doubt that's the case, but it's a thought.

Next up: See if you can find my initials on the LMP2021... 🙂

Tom
 
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