Hi Guys,
If an amp is with a FET (mosfet or jfet) input stage, can I omit the DC-blocking feedback cap?
I need real world experience. As you know, in the simulation, everything is perfect.
Thanks.
If an amp is with a FET (mosfet or jfet) input stage, can I omit the DC-blocking feedback cap?
I need real world experience. As you know, in the simulation, everything is perfect.
Thanks.
It’s not expressly clear what you are referring to. Are you referring to a capacitor across the feedback resistor?
I'm sure what you're describing with "DC-blocking feedback cap." There must be a path for DC bias current to the inverting input; it might come from the opamp output or from global feedback at the amp output. There also must be a DC path for the non-inverting pin. Necessary for all opamp types.
BTW, the opamp + input needs a bias resistor to ground in this post. https://www.diyaudio.com/community/...ant-a-relentless-analysis.419418/post-7843243
BTW, the opamp + input needs a bias resistor to ground in this post. https://www.diyaudio.com/community/...ant-a-relentless-analysis.419418/post-7843243
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This one C2. In theory, there is no bias current for FET input. I am thinking remove the C2 for better performance.
If you remove C2, the AC gain will become 1 rather than the formula in the figure.
Note opamp dc bias is established by "R3" for both input pins. Odd that R3 Ref Des is used in both positions.
There is always leakage current that must be addressed via some mechanism; even if the bias current were 0, you still would need to establish its desired bias voltage.
Note opamp dc bias is established by "R3" for both input pins. Odd that R3 Ref Des is used in both positions.
There is always leakage current that must be addressed via some mechanism; even if the bias current were 0, you still would need to establish its desired bias voltage.
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That one was my unfinished design. I got it working without the opamp at front. Perhaps, I will post it in a separate thread later.
The resistor on the top should be R2. That image is a random image from the forum. (and the formula is also wrong 🤣)
If you omit the cap, the opamp will amplify the offset voltage. Say your gain is 10x and the offset is 4mV (typical for a TL072), then your output DC offset will be 40mV. If your load can handle it, then you should be ok.
Separately, why do you think omitting the capacitor will improve performance? As long as you size it correctly to ensure the -3dB is well 10x lower than your lowest expected signal frequency, you should be good to go.
Separately, why do you think omitting the capacitor will improve performance? As long as you size it correctly to ensure the -3dB is well 10x lower than your lowest expected signal frequency, you should be good to go.
I assumed omitting C2 meant open circuit, especially since you mentioned 0 bias current. 😉 If you replace C2 with a short, of course the gain is 1+R3/R1. Sorry if I misread your intent.
There are several big errors here -
Removing C2 will NOT make the gain 1, it's for DC bias purposes only. And C2 is not to prevent amplification of the offset voltage.
C2 is typically used if you are powering the op-amp with a single rail supply, such that the op-amp is biased to a "virtual ground" of VDD/2. If C2 were omitted and R1 tied to the negative rail (in this case ground) the amp would saturate and not work.
Since this amp is supplied symmetrically with a +/- bipolar supply, and the bias point is ground, which is assumed directly between the two voltage rails, C2 can be omitted with no effect. I agree that C2 does not hurt, choose a value that is large enough to have no affect in frequency response.
Removing C2 will NOT make the gain 1, it's for DC bias purposes only. And C2 is not to prevent amplification of the offset voltage.
C2 is typically used if you are powering the op-amp with a single rail supply, such that the op-amp is biased to a "virtual ground" of VDD/2. If C2 were omitted and R1 tied to the negative rail (in this case ground) the amp would saturate and not work.
Since this amp is supplied symmetrically with a +/- bipolar supply, and the bias point is ground, which is assumed directly between the two voltage rails, C2 can be omitted with no effect. I agree that C2 does not hurt, choose a value that is large enough to have no affect in frequency response.
Even with C2 there, the input current for the negative input will be drawn from the output through the top R3.
This evolving discussion needs to specify whether removing C2 means shorting its terminals or replacing with an open circuit. Changes everything.
Very often C2 is used to reduce gain to unity at DC to minimize bias offset error, but to also allow establishment of AC gain.
Very often C2 is used to reduce gain to unity at DC to minimize bias offset error, but to also allow establishment of AC gain.
Oh, wow. So much misinformation and confusion in so few posts.
To start with, there are two resistors marked R3 in the schematic. If we relabel the R3 that goes from the opamp's output to its inverting input as R2 the AC gain of the circuit becomes 1+R2/R1.
C2 is an open circuit at DC, so the circuit has unity gain at DC.
One benefit of having C2 there is that the offset voltage of the opamp 'sees' unity gain instead of 1+R2/R1.
Note that C1 and C3 also form a high-pass filter, so there're some decisions to make about the alignment of the pole set by R1, C2 and the one set by C1, R3.
Tom
To start with, there are two resistors marked R3 in the schematic. If we relabel the R3 that goes from the opamp's output to its inverting input as R2 the AC gain of the circuit becomes 1+R2/R1.
C2 is an open circuit at DC, so the circuit has unity gain at DC.
One benefit of having C2 there is that the offset voltage of the opamp 'sees' unity gain instead of 1+R2/R1.
No, actually. C2 is often used to set the lower pole (or -3 dB point) of the circuit. I also use it to prevent amplification of the DC offset. It's used quite a bit even in split rail/bipolar supply designs.
Note that C1 and C3 also form a high-pass filter, so there're some decisions to make about the alignment of the pole set by R1, C2 and the one set by C1, R3.
True. I take "remove C2" to mean that C2 is replaced by a short circuit.
Tom
What makes you think it will have that effect?
Changing the frequency response does not equate to better performance.
That is a long story.
In short.
I am working on some unusual bias scheme. It adds an extra low frequency pole, besides the pole from that "Cap". You know "2 poles" is not a good news. It tends to oscillate. One option is to omit that "Cap". I want to know how big the deal is if I do that in real world (as everything is perfect in the simulation).
The answer to that is to separate them. Not just start removing components willy-nilly.
I don’t see how a bias scheme can introduce a pole.