I2S 2:1 switching module

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I've made my own digital isolator for i2s (24.576MHz). Quite a few of the isolator ICs (like the MAX 200MBits/sec) have an enable pin(s) that could be used to simply switch on/off to a common bus output. You could have a final output isolator/buffer to maintain a common output impedance.

The issue I see is - how does the switching of bit rate occur between the designs? Are all the connected devices the same bit configuration? How do you know when to switch on a frame boundary (unless your managing this you'll get some crunches/pops etc).
 
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Well I want to be good so ultra-low jitter/phase-noise, if possible not a lot of small SMD parts, I'm not rich but can spend some money.

Just because I detected the Simple DSD Modulator or his PSU & reg. not sound as clear like Amanero directo to LPF without the Simple DSD Modulator, at this moment I'm testing several kind of regs. but results aren't promising. So I want the possibility to switch for Amanero+Simple DSD Modulator+LPF to Amanero+LPF.

No, I dislike the idea to have two USB boards.
 
...detected the Simple DSD Modulator or his PSU & reg. not sound as clear like Amanero directo to LPF without the Simple DSD Modulator...
Noticed more or less the same tendency here. The problem here looked like Simple DSD Converter output is more jittery than Amanero output. Not surprising. John Westlake described jitter measurements out of FPGAs before. FPGAs tend to be jittery, although they may be adjustable for skew and or rise-time. Not the same things as jitter/phase-noise unfortunately.

What you may want to do is try reclocking the FPGA outputs using the Amanero MCLK signal. Without isolation you may still have some ground-coupled noise, but wouldn't be surprised if you find it sounds a lot better with a fairly simple fix. You would need to implement it like proper RF, no loose wires dangling, no vector board type of stuff. A proper ground plane and that sort of thing would be called for.
 
disconnect the Amanero MCLK output to Simple DSD Modulator MCLK input and connect to BCLK Simple DSD Modulator output?
Not exactly. You would need MCLCK in two places. It still needs to go into the DSD Modulator.

You might also have something like the following after the DSD converter:
1679054187511.png


Where it says BUF23 is where the MCLCK would connect. The reason the signal is called BUFxx is probably because it is a buffered copy of MCLK. The I2S signals from the DSD converter would come in on the three vertical lines at the top, the the reclocked I2S would come out after R20 though R22 at the bottom of the picture.

Of course, there likely could be problem if DSD Converter outputs are too delayed in time. It may be necessary to delay them even more or else delay the BUF23 signal to get them time aligned to meet the D-Flip Flop 'setup' and 'hold' requirements. You would also need a 100Mhz or faster scope to see what's going on.

There is also a clock inverter shown in the picture that, if needed, could be selected by a jumper on the 3-pin header.
 
Not exactly. You would need MCLCK in two places. It still needs to go into the DSD Modulator.

You might also have something like the following after the DSD converter:
View attachment 1154573

Where it says BUF23 is where the MCLCK would connect. The reason the signal is called BUFxx is probably because it is a buffered copy of MCLK. The I2S signals from the DSD converter would come in on the three vertical lines at the top, the the reclocked I2S would come out after R20 though R22 at the bottom of the picture.

Of course, there likely could be problem if DSD Converter outputs are too delayed in time. It may be necessary to delay them even more or else delay the BUF23 signal to get them time aligned to meet the D-Flip Flop 'setup' and 'hold' requirements. You would also need a 100Mhz or faster scope to see what's going on.

There is also a clock inverter shown in the picture that, if needed, could be selected by a jumper on the 3-pin header.
Too much complicated because I don't own a faster scope as you know.

Also tried flip-flop before for the noDac & disliked the sound a lot.
 
Look, its very particular RF. You need a fast enough scope to see what's going on. You need 4-layer boards with ground planes, and proper impedance interconnections between boards. You need good clocks. You need clean power. If the implementation is crap, then the sound may be crap too.

IOW its not just 'long.' Long can be fine if its done properly.