LTSpice - long simulation time, conflicting requirments

I want to investige the effect of power supply upgrades on the Rotel 850 amplifier.

I have already determined that the PSRR of the output stage is 86dB, whilst the "front end" is only 40dB.

Since it is also the output stage that places high loads (and hence more "ripple") on the PSU, it makes sense to improve the front end's PSU in some way.

I have encountered a simulation difficulty. When measuring THD with good accuracy, 20Hz to 20Khz, you need to simulation with a small time step.

But in circuits with linear power supplies and good filtering, the power supplies can take a rather long time (multiple seconds) to stabilise.

These two things combine to give very long simulation times, not conducive to experimenting.

Is there a known good approach to this?

BugBear
 
Use known initial conditions to speed up getting to a steady-state. Get a faster PC with more memory. See if you can prune the number of devices needed to just emulate what you are after (eg. no need for preamp parts). That is the flip side to wanting better and better resolution in the time frame.

Also better to use one thread than make multiple threads on particular aspects of the same project.
 
Use known initial conditions to speed up getting to a steady-state. Get a faster PC with more memory. See if you can prune the number of devices needed to just emulate what you are after (eg. no need for preamp parts). That is the flip side to wanting better and better resolution in the time frame.

Also better to use one thread than make multiple threads on particular aspects of the same project.
Apols - I was trying to group my posts LTSpice-feature-centrically, not project-centrically.

BugBear
 
By default LTSpice should be computing DC conditions at the start of a simulation and run from that,
though I think you can turn that off. So for instance if you simulate a transformer/rectifier/filter cap PSU
make sure the sinusoid representing the transformer is a cosine, not a sine, so that its at full voltage at
t=0, then the sim will use that as the DC initial conditions.

One technique I've used to investigate PSRR is to make the rail source a 1V sinusoid on top of its DC value, and
look at the FFT results to see how much of the rail signal bleeds into the output (or here I guess the
preamp rails). You can use different frequencies on the two rails and measure the PSRR together for
both.
 
Why do you want to look at distortion AND PSRR in a single sim run (as I understand you do)? These are two different things and you should do two sim runs, each optimized for its purpose. Divide and conquer.
I am doing exactly as you suggest. Having measured the PSRRs of the front end and power stages, I'm now investigating the effect on THD of various approaches to protecting the FE from the damage the power stages inflict when using a single PSU.

BugBear