I'm a software engineer, but I don't have a lot of embedded systems experience so it's something new for me to poke at. You'll want to look at using something like vagrant to run an Ubuntu image on your windows machine in a virtual machine like virtualbox. That makes things a lot more simple and is how I typically do my work. I don't know if you'll have trouble but I think you can route usb dongles through the VM from the host to client machine.
I need to set up a bench area with my soldering equipment, oscilloscope, power supplies, etc. What FPGA board are you running? I am debating on getting a more powerful one now, maybe something with the Artix-7 XC7A200T.
No, I would rather not do a virtual machine at this point (although I have done them before). I can always add one later to any OS n the machine that will support it. If I need it for some reason then I will do it.
Its just if, say, I want to nuke Windows and reload it, I don't want Ubuntu to be down until Windows is back up and configured. Things like that. It will be okay, I know how to do it every which way.
Also, I am using UEFI, but the OS installations still try to take over all the booting. I will set the bios to UEFI_only mode while installing OS's. Later if I want to boot from a non-UEFI device I always change it to UEFI_and_bios mode. Strangely, I could't get CentOS to even start booting until the computer was out of the dual mode and set back to UEFI_only.
Its just if, say, I want to nuke Windows and reload it, I don't want Ubuntu to be down until Windows is back up and configured. Things like that. It will be okay, I know how to do it every which way.
Also, I am using UEFI, but the OS installations still try to take over all the booting. I will set the bios to UEFI_only mode while installing OS's. Later if I want to boot from a non-UEFI device I always change it to UEFI_and_bios mode. Strangely, I could't get CentOS to even start booting until the computer was out of the dual mode and set back to UEFI_only.
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EDIT: it is the slightly more expensive version with the faster clock: Arty S7-50T
Spartan-7 FPGA Development Board for Hobbyists - Digilent Arty S7 - Xilinx
Arty S7 [Reference.Digilentinc]
Pmod I2S [Reference.Digilentinc]
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That Arty S7-50T has a pretty good price-to-performance ratio. That might not be a bad way to get my feet wet for cheap.
Same thought here. It's probably fast enough to demonstrate an interpolation filter at some sample rate, although maybe not as fast as we might ultimately want to go and or maybe not quite as many taps as we would like to have.
Yeah, I am probably doing myself a favor by testing stuff on this cheaper chip before I start buying $200-350 ICs.
Benchmark DAC-3 uses a Spartan 6 clocked at 50MHz for interpolation. It interpolates upsampled PCM coming from an SRC4392 (clocked at 27MHz) upsampling to 211kHz. The worst case filtering situation is if the source digital audio was 192kHz (the highest supported), meaning Nyquist is 96kHz. Upsampling moves that up to 105.5kHz, thus providing roughly another 10kHz bandwidth which can be occupied by a more relaxed transition band continuing down to a more attenuated stopband (as compared to the built-in dac filters). Listening tests with an otherwise well implemented dac will be required for tweaking filter performance for the best listening experience. At that point it would be helpful to have something like DAC-3 for SQ targeting reference.
My big desire for power is because I'd like to do 12-16 channels. That's not a necessity right at this moment, but Benchmark using such a low power FPGA does kind of put things into perspective. I'll most likely need the mega-FPGA for multiple channels of high bitrate FIR filtering, but not for interpolation. I can always place the FIR filtering before interpolation (which I may need to do) but I'm intrigued by the idea of performing high-order FIR filters on a high bitrate interpolated signal.
If I recall correctly you were saying you were targeting interpolation to DSD256 for the Sabre E9028's right?
I'm probably not going to have a reference DAC to compare to (I'm all-in on building one) but I think a lot can be taken from the output waveform appearance on a signal analyzer. But maybe you'll release your version of the improved, affordable "ES9028 china boards" by then.
If I recall correctly you were saying you were targeting interpolation to DSD256 for the Sabre E9028's right?
I'm probably not going to have a reference DAC to compare to (I'm all-in on building one) but I think a lot can be taken from the output waveform appearance on a signal analyzer. But maybe you'll release your version of the improved, affordable "ES9028 china boards" by then.
Regarding PCM and DSD, I use DSD now because I think it sounds better in the absence of a good PCM interpolation filter. DSD can't be edited or resampled (interpolated) that I know of without conversion to PCM first. What it means, so far as I am aware, is that PCM shouldn't be converted DSD until right before it is ready to go into the dac modulator. It would probably mean learning how to write a DSD modulator in FPGA, mostly likely another problem to think about at another time. PCM through a good filter can sound really good though, so no DSD or DSD not derived from best filter quality PCM might not be a big deal at least at first.
Another problem that would need solving before DSD would be a digital volume control. In Sabre dacs it is implemented in the interpolation filter processing stage and the functionality is lost if using external interpolation.
Since FIR filters are linear, the gain can be changed by adjusting all the coefficients at once up or down by the same multiplier, or maybe by making a single digital level adjustment at the end. If processing bit depth is enough such as with maybe 64-bit float the latter volume level adjustment solution might be okay, but with 32-bit fixed point it might not be good enough.
What they did in DAC-3, they say, was solve the problem partly in analog by using more than 2 dac channels, maybe all 8 channels, that then get summed together after the dac output in analog. They could then digitally adjust up or down and or invert single channels such that when combined in analog no one channel is allowed to lose too much bit resolution. To make that work as intended, they say to adjust fixed output attenuators using jumpers inside the dac such that normal volume knob settings are in the upper half of the knob rotation, which avoids too much loss of resolution and or increased (dither?) noise.
Another thing they do of course is turn down the digital volume level by 3dB to 4dB before the dac to avoid intersample overs. When the volume knob is turned up around to the last 3dB or 4dB of the way to full volume, the FPGA gets the last bit of the volume level up to full by reducing intersample over protection. At full volume knob rotation, there is no remaining protection. Why? So that measurements will show the dac dynamic range is SOA. If they never gave back the last few dB of digital gain, DR measurements would look worse by that missing few dB.
Lots of stuff to think about, but not in the first version.
Also, before someone asks about intersample overs in SRC4392, it may have enough digital headroom to be immune, or maybe it can be programmed that way. Otherwise its I2S input might need to pass through another I2S channel programmed into the FPGA to turn down SRC4392 I2S input level enough to prevent intersample overs in it. In that case, then that FPGA I2S channel output would go to an SRC4392 I2S input for upsampling to 211kHz. From SRC4132 output it would go into the FPGA interpolation filter channel I2S input. SPDIF gets routed directly into SRC4392 which then converts the SPDIF to 211kHz I2S and from there it is sent to the interpolation filter input. USB audio from the XMOS chip would go to into an I2S input of SRC4392 for upsampling to 211kHz and then out for to FPGA for interpolation.
Another problem that would need solving before DSD would be a digital volume control. In Sabre dacs it is implemented in the interpolation filter processing stage and the functionality is lost if using external interpolation.
Since FIR filters are linear, the gain can be changed by adjusting all the coefficients at once up or down by the same multiplier, or maybe by making a single digital level adjustment at the end. If processing bit depth is enough such as with maybe 64-bit float the latter volume level adjustment solution might be okay, but with 32-bit fixed point it might not be good enough.
What they did in DAC-3, they say, was solve the problem partly in analog by using more than 2 dac channels, maybe all 8 channels, that then get summed together after the dac output in analog. They could then digitally adjust up or down and or invert single channels such that when combined in analog no one channel is allowed to lose too much bit resolution. To make that work as intended, they say to adjust fixed output attenuators using jumpers inside the dac such that normal volume knob settings are in the upper half of the knob rotation, which avoids too much loss of resolution and or increased (dither?) noise.
Another thing they do of course is turn down the digital volume level by 3dB to 4dB before the dac to avoid intersample overs. When the volume knob is turned up around to the last 3dB or 4dB of the way to full volume, the FPGA gets the last bit of the volume level up to full by reducing intersample over protection. At full volume knob rotation, there is no remaining protection. Why? So that measurements will show the dac dynamic range is SOA. If they never gave back the last few dB of digital gain, DR measurements would look worse by that missing few dB.
Lots of stuff to think about, but not in the first version.
Also, before someone asks about intersample overs in SRC4392, it may have enough digital headroom to be immune, or maybe it can be programmed that way. Otherwise its I2S input might need to pass through another I2S channel programmed into the FPGA to turn down SRC4392 I2S input level enough to prevent intersample overs in it. In that case, then that FPGA I2S channel output would go to an SRC4392 I2S input for upsampling to 211kHz. From SRC4132 output it would go into the FPGA interpolation filter channel I2S input. SPDIF gets routed directly into SRC4392 which then converts the SPDIF to 211kHz I2S and from there it is sent to the interpolation filter input. USB audio from the XMOS chip would go to into an I2S input of SRC4392 for upsampling to 211kHz and then out for to FPGA for interpolation.
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Mark, foobar has a kernel streaming plugin, have you checked that out?
I was trying to completely bypass windows audio processing, in the end bypassing the volume control fully (so it has no effect) doesnt seem to be possible, but leaving it at max is probably as good as bypassing.
One notable difference with KS vs WASAPI was that if you change the device sample rate or bit depth in windows control panel while music is playing it keeps playing, with WASAPI it stops, I guess KS avoids SRC like ASIO... might be useful if you dont have ASIO driver for your device.
I was trying to completely bypass windows audio processing, in the end bypassing the volume control fully (so it has no effect) doesnt seem to be possible, but leaving it at max is probably as good as bypassing.
One notable difference with KS vs WASAPI was that if you change the device sample rate or bit depth in windows control panel while music is playing it keeps playing, with WASAPI it stops, I guess KS avoids SRC like ASIO... might be useful if you dont have ASIO driver for your device.
No, and I would be reluctant to trust it based on information at a couple of web pages:
foobar2000: Components Repository - Kernel Streaming support
Foobar2000:Components/Kernel Streaming support (foo out ks) - Hydrogenaudio Knowledgebase
Doesn't appear to be Window 10 qualified. The advice I gave a few post before this on Windows configuration for audio was based in part on a useful capability of my last desktop PC to monitor sample rate and bit depth being sent out of the computer using the Lynx Mixer for my old Lynx II sound card. The only proven method I know of for achieving reliable sound quality as affected by Windows sound system configuration is as I described.
Regarding leaving Windows master volume at full, intersample over distortion has nothing to do with Windows, as it doesn't know what you have connected to the I2S side of your USB card. Intersample overs occur in oversampling dacs in the interpolation filters that are not designed for reconstructed peak exceeding 0dBFS. But the overs can and do happen, and frequently. You can read about yourself: Intersample Overs in CD Recordings - Benchmark Media Systems
It turns out that both ES9038Q2M and AK4137 are subject to intersample overs and it does cause audible distortion that I can hear and have measured. The fix is to reduce the digital volume level before it reaches point in devices subject to distorting under intersample over conditions. I have measured on more than one occasion how much Windows master volume level needs to be turned down to prevent them in the dac and or in AK4137. Someone else told me they found that turning down the dac volume control worked just as well for the dac itself, but he was using a TP Buffalo dac with a PRO Sabre chip. What I recall finding with ES9038Q2M is that turning down its volume control didn't prevent the distortion. However, I am inclined to want to double check that once more based on what the other person reported. There is a chance I might have been hearing AK4137 distortion and of course the dac volume pot couldn't affect that. So, for now I stand my my recommendations on turning down the digital level in Windows. If someone is able to double check the dac volume control that might be wise before relying on it. If you can't hear intersample over distortion and or can't hear when Windows is resampling audio sent to the dac, what that could mean is that somewhere between your dac, power amp, and or speakers there is still too much distortion and or noise so that other distortion sources may be masked from audibility. That's one reason I recommended building a modded low distortion headphone amp. If that seems like too much work TP has a LME49600 HPA kit that is easy to put together and seem like a bargain for the price. Maybe it is slightly flattering to dacs that drive it, but stereo separation is great, and it is compensated to be stable with a lot of possible loads. There is actually one here, and maybe one day I will think about seeing if I can tweak it a bit to see how I like it configured a little different. That being said, it is something that can be a really good tool for understanding what is really coming out of your dac, and whether or not your power amp is as honest as you might want it to be.
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FPGA Info for New or Prospective Filter Designers
Found a book I would recommend to new Xilinx FPGA programmers/designers: "100 Power Tips for FPGA Designers." This is a book in which a majority of the content seems worth reading sooner rather than later, at for those who don't know it all already. Very practical resource.
Found a book I would recommend to new Xilinx FPGA programmers/designers: "100 Power Tips for FPGA Designers." This is a book in which a majority of the content seems worth reading sooner rather than later, at for those who don't know it all already. Very practical resource.
Hi,
I have a simple question.
Can I run such a simple board (ES9038 Q2M I2S DSD Optical Coaxial Decoder DAC Headphone Output Audio Amplifier | eBaywith my RaspberryPi 3b via I2S by direct connection of the
pins BCK, LRCK, GND and DATA with a distribution like volumio?
I have a simple question.
Can I run such a simple board (ES9038 Q2M I2S DSD Optical Coaxial Decoder DAC Headphone Output Audio Amplifier | eBaywith my RaspberryPi 3b via I2S by direct connection of the
pins BCK, LRCK, GND and DATA with a distribution like volumio?
Simple answer is, yes.
That is exactly the same board most commonly modded in this thread. I think someone wrote at least a preliminary RPi driver for it:
https://www.diyaudio.com/forums/digital-line-level/314935-es9038q2m-board-336.html#post5630630
https://www.diyaudio.com/forums/digital-line-level/314935-es9038q2m-board-338.html#post5633055
Thought I would attach the list of chapter topics for the downloadable Xilinx 'DSP University' introductory self-study material on DSP. Besides general information, there is also some useful focus on DSP in the context of achieving good performance with Xilinx FPGAs.
Xilinx also has a number of other printed resources, some of which I may recommend from time to time.
In addition, there are a number of introductory Youtube videos on various topic such as getting started with Vivado.
I am posting the list of chapters with the thought in mind that is the material can be for anyone who thinks they might be interested DSP, FPGAs, and how to best use the Xilinx line of FPGAs.
There is something available for everyone who has an interest in such things, starting from the very basics of digital and continuing up to and including some rather sophisticated applications (although the level of sophistication in the introductory chapters tends to be at a basic level, the more sophisticated material from Xilinx and other resources can be found after the introductory material has been comfortably digested).
It's highly recommended stuff to learn about, IMHO. No doubt there will be more and more digital and DSP aspects to audio design as time goes on. Also, no time like the present to get started, even if its only a toe in the water rather than a deep dive.
Xilinx also has a number of other printed resources, some of which I may recommend from time to time.
In addition, there are a number of introductory Youtube videos on various topic such as getting started with Vivado.
I am posting the list of chapters with the thought in mind that is the material can be for anyone who thinks they might be interested DSP, FPGAs, and how to best use the Xilinx line of FPGAs.
There is something available for everyone who has an interest in such things, starting from the very basics of digital and continuing up to and including some rather sophisticated applications (although the level of sophistication in the introductory chapters tends to be at a basic level, the more sophisticated material from Xilinx and other resources can be found after the introductory material has been comfortably digested).
It's highly recommended stuff to learn about, IMHO. No doubt there will be more and more digital and DSP aspects to audio design as time goes on. Also, no time like the present to get started, even if its only a toe in the water rather than a deep dive.
Attachments
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