I don't understand jitter much either, Hartono. But I do respect the fact that different inputs can generate different jitter and most DAC's are not perfect in handling the incoming jitter, or not self-generating jitter internally. That is one reason why I don't think much about cheap CD reproduction as being even worth listening to. Of course, that is only my opinion, the rest of you can enjoy your cheap, cost-effective engineered CD equipment, if they sound OK to you.
If the noise is such a problem that it is altering the sound then yes. All the connections you mention are digital so getting the data to the DAC, so YES they should all sound exactly the same, that is the whole point of this, its raw digital data delivered to a digital to analogue converter. Think of all the instances where DACs are used (and ADCs) where however the data is delivered you want the data to be reproduced exactly without the delivery system effecting the result...
Jitter, noise, all apear in every other instance of ADC and DAC based systems they can be overcome by engineering.... As for jitter I do believe figures have been posted on this forum showing how well even modern cheap DACs perform in that respect, just do a search and you can read the previous posts, that have been very educational on this subject. These of course do not promote the spirit of belief so are often discarded, discussions and posts of green felt tips seem to get more respect!
Engineered being the operative word, provide some proof that they are so bad instead of just promoting the high cost equates to quality sound reproduction...
Since your POV is from "properly engineered", which is a valid point of view and I don't dismiss that really. Most transport "as-is" is not and that's where this discussion is trying to pinpoint the pitfalls, if it is to progress.
If you have discovered some technique to minimize such effect and the subtle sonic difference, it is very welcomed.
Maybe suggestion on what SPDIF transformer spec is preferable, or SPDIF receiver/transmitter, or filtering, power line filtering all very welcomed if you'd like to share maybe to enlighten this forum members of most common pitfalls.
I'd like to emphasize to the others, that the sonic difference observed is not always so obvious or even matter much, YMMV. So that people don't get wrong idea of the improvement/difference here. For most people it might be totally fine, we can only do so much to improve things in one area.
Parasound Halo CD 1 CD player Measurements | Stereophile.com
Note JC had nothing to do with the digital side of this, but I think it might upset the conspiracy theorists when you look at the data. This unit reads the CD at 4x and then buffers if 2 consecutive reads match.
Note JC had nothing to do with the digital side of this, but I think it might upset the conspiracy theorists when you look at the data. This unit reads the CD at 4x and then buffers if 2 consecutive reads match.
The second paragraph did make me chuckle a bit...]
Start here:
https://www.amazon.co.uk/Electromagnetic-Compatibility-Engineering-Henry-Ott/dp/0470189304
here:
Wiley: Solving Interference Problems in Electronics - Ralph Morrison
then here:
https://www.amazon.co.uk/Digital-Design-Prentice-Modern-Semiconductor/dp/0133957241
onto here:
https://www.amazon.com/Signal-Power-Integrity-Simplified-2nd/dp/0132349795
and so on and on and on...
Put up plenty of stuff regarding this sort of stuff as have many others, just makes me laugh that all this is a new discovery...
😉
Ok now we have some good inputs at least.
Very welcomed addition to reading materials.
Of course I've read some signal integrity and digital design books, I was talking more about specific implementation details beyond the norm. By all no means I am not trying to belittle or getting more than you prefer to share.
I will look into some of this books, any extra knowledge pointer is always welcomed.
Ok now we have some good inputs at least.
Very welcomed addition to reading materials.
Of course I've read some signal integrity and digital design books, I was talking more about specific implementation details beyond the norm. By all no means I am not trying to belittle or getting more than you prefer to share.
I will look into some of this books, any extra knowledge pointer is always welcomed.
If anyone wants to listen to jitter here are some files you can download.
https://hydrogenaud.io/index.php/topic,107570.msg905631.html#msg905631
https://hydrogenaud.io/index.php/topic,107570.msg905631.html#msg905631
Really? You really plan to get some of these books and study them? Wow.
Maybe you can then post a review here?
Jan
There is nothing I wont share if I have the information.
What specific implementation details do you want that arn't the norm, we use the normal implementation for ALL digital interfaces including the ones that are far faster than simple SPDIF or USB for that matter (USB audio speeds). What works for them works for SPDIF.
The best way is a 75R termination resistor for SPDIF did some sims that I posted a few pages back that shows how well its cleans the wave up. A correct transformer also works but can still couple noise through capacitive coupling. But to remove ringing a termination resistor works perfectly.
The links posted are by people who are considered the best in all this, this probably is the pinnacle of available information in these areas. With notes and design guides from the chip manufacturers and other sources I have a few gig of related information regarding all this stuff, there is plenty of info out there...
What specific implementation details do you want that arn't the norm, we use the normal implementation for ALL digital interfaces including the ones that are far faster than simple SPDIF or USB for that matter (USB audio speeds). What works for them works for SPDIF.
The best way is a 75R termination resistor for SPDIF did some sims that I posted a few pages back that shows how well its cleans the wave up. A correct transformer also works but can still couple noise through capacitive coupling. But to remove ringing a termination resistor works perfectly.
The links posted are by people who are considered the best in all this, this probably is the pinnacle of available information in these areas. With notes and design guides from the chip manufacturers and other sources I have a few gig of related information regarding all this stuff, there is plenty of info out there...
You have lumped together two different types of connection. SPDIF, AES/EBU and Toslink deliver bits and timing, although the timing may be modified by the receiver PLL in the DAC; a sufficiently bad clock in the source may produce audible jitter. USB and LAN deliver just bits, so the source clock is irrelevant unless it is so bad that bits are corrupted which would then lead to checksum failure. As you are listening to two different clock sources, there is some scope for differences in sound if the equipment is faulty or so poorly-designed that it is equivalent to being faulty.Hartono said:
Ah, the 'poor' slur. I'm not certain whether that is better or worse than the 'deaf' slur or the 'stupid' slur.john curl said:
I maybe should have added this:
EMC Information Centre - The EMC Journal (Free in the UK)
a good source of practical information.
A quick revue of the books...
All are interesting and provide information that can be overwhelming for many ( my self included) with pages and pages of maths. But the information is explained in clear and concise terms and further reading matter on any subject is readily available with quick searches of the internet. For those like myself who dont have the inclination for all the maths, then there are many online tools to do the hard work for you, such as calculating trace impedance's one such being...
/www.saturnpcb.com/pcb_toolkit.htm
From the perspective of PCB layout and system interfacing we use tools such as signal integrity and power integrity ad-dons (the power integrity tools also employ EMC advisory functions as well) to do all the hard work and get pretty little pictures of waveforms or areas indicated by tonal mapping to show areas of concern, map a power planes impedance at various frequencies etc..
Also when planning and doing a layout very careful thought goes into the location or sub circuits, interfaces to the outside world (connections on and off a PCB), number of layers, layer stack up, what connections will run on what layers (what is above and below a signal is critical), how the current loop runs and from where it originates and ends (power distribution) etc. etc.
Then you have to consider the interfaces to the real world, cables, interfacing units, external EMC, working environment for the finished unit (temp range, humidity, vibration)...
All this is pretty standard product design and development, all well documented and available. Doing a basic digital interface for a domestic equipment is pretty much the most benign environment to design for.
EMC Information Centre - The EMC Journal (Free in the UK)
a good source of practical information.
A quick revue of the books...
All are interesting and provide information that can be overwhelming for many ( my self included) with pages and pages of maths. But the information is explained in clear and concise terms and further reading matter on any subject is readily available with quick searches of the internet. For those like myself who dont have the inclination for all the maths, then there are many online tools to do the hard work for you, such as calculating trace impedance's one such being...
/www.saturnpcb.com/pcb_toolkit.htm
From the perspective of PCB layout and system interfacing we use tools such as signal integrity and power integrity ad-dons (the power integrity tools also employ EMC advisory functions as well) to do all the hard work and get pretty little pictures of waveforms or areas indicated by tonal mapping to show areas of concern, map a power planes impedance at various frequencies etc..
Also when planning and doing a layout very careful thought goes into the location or sub circuits, interfaces to the outside world (connections on and off a PCB), number of layers, layer stack up, what connections will run on what layers (what is above and below a signal is critical), how the current loop runs and from where it originates and ends (power distribution) etc. etc.
Then you have to consider the interfaces to the real world, cables, interfacing units, external EMC, working environment for the finished unit (temp range, humidity, vibration)...
All this is pretty standard product design and development, all well documented and available. Doing a basic digital interface for a domestic equipment is pretty much the most benign environment to design for.
"What specific implementation details do you want that arn't the norm, we use the normal implementation for ALL digital interfaces including the ones that are far faster than simple SPDIF or USB for that matter (USB audio speeds). What works for them works for SPDIF."
Okay I see your implementation here. Yes bit perfect transfer within specified tolerance of jitter is not issue with this implementation.
However, for example some transport has gone beyond as far as re-shaping the signal out of the transport, to contain less harmonics overall. this might compromise relative jitter performance so need to be judiciously used in the correct system combination.
Some also use SPDIF transformer with capacitive screen, designed within limit that still retain bit integrity of the signal, again it would alter jitter as well, and cost more, there are trade offs.
Just my observation. Of course others would prefer to maintain perfect relative jitter from the transport itself as main priority.
Okay I see your implementation here. Yes bit perfect transfer within specified tolerance of jitter is not issue with this implementation.
However, for example some transport has gone beyond as far as re-shaping the signal out of the transport, to contain less harmonics overall. this might compromise relative jitter performance so need to be judiciously used in the correct system combination.
Some also use SPDIF transformer with capacitive screen, designed within limit that still retain bit integrity of the signal, again it would alter jitter as well, and cost more, there are trade offs.
Just my observation. Of course others would prefer to maintain perfect relative jitter from the transport itself as main priority.
How would containing less harmonics overall effect the jitter...
What determines the upper harmonic content of a square wave?
If you looked at DDR memory "square waves" on a scope you would be surprised, they are not very square, the squareness of the wave within limits is not an issue. There does seem to be a belief that the squarest wave is the best...
Curious has to how they would reshape the wave, any examples (though we discussed this in detail on a thread trying to determine the sound output from the shape of the digital waveform) of the resultant wave. This is usually down to either a series terminating resistor or low drive current from the driving device (hint this relates to the last question) if you are referring to rounded waveforms, layout can also have an effect.
As to the first sentence, why do you think we have and use all these tools, why do you think we simulate the actual PCB layout using SIV software; we do it to check the signal integrity using the actual layout and if required multi boar designs with electrical models of the cables so we can check the data from source to destination. We can also do sweeps of all the min and max electrical conditions for all the components including the drive strength of the source component ... this is all confirmed by actual measurement of real devices (the proto type stage). This is basic engineering and will be carried out on any competently engineered product, so bit perfect transfer (or as near as dammit) is ensured.
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