Again ... about capacitance in PS and Noise+THD

Status
Not open for further replies.
Member
Joined 2009
Paid Member
Hi !
i have found the following interesting graph ... about capacitance in a power supply

vrefcap.png


it seems that the more the uF the better ... and this even at high Hz.
The uF are place very close to the utilizing circuit and between V+ and ground of course.
Do you have other measurements maybe that confirm this ?
Thanks and regards,
gino
 
This is filtering the VREF of the ADC. It's not talking about the general case of decoupling or power supply capacitance.

Hi and thanks a lot for the kind and helpful.
I see now that i have understood completely wrong.
Still what i would like to see is a similar graph for an amp/power amp.
I mean, if we take an amp with let's say 10 mF of total capacitance in the PS and we put 100 mF instead will the measurements on this amp (i.e. THD and noise) change ?
With any other thing left untouched of course.
Thanks again, gino
 
Hi !
i have found the following interesting graph ... about capacitance in a power supply

The primary source is:

http://www.akm.com/akm/en/file/ev-board-manual/AK4490EQ.pdf

page 13.


This is a secondary source and seems to shed no light on the context:


Relevant schematic appears to be on p 44 of the primary reference.

That schematic shows that the power supply lines are the outputs of an AD 817 regulator that are coupled to ground by 100 uF caps.

It seems that the more the uF the better ... and this even at high Hz.
The uF are place very close to the utilizing circuit and between V+ and ground of course.

The parts appear to be coupling two slightly different positive power supplies.

Do you have other measurements maybe that confirm this ?
Thanks and regards,
gino

Seems like an undesirable exposure in the design of the chip.
 
The primary source is:
http://www.akm.com/akm/en/file/ev-board-manual/AK4490EQ.pdf
page 13.
This is a secondary source and seems to shed no light on the context:
Relevant schematic appears to be on p 44 of the primary reference.
That schematic shows that the power supply lines are the outputs of an AD 817 regulator that are coupled to ground by 100 uF caps.
The parts appear to be coupling two slightly different positive power supplies.
Seems like an undesirable exposure in the design of the chip

Hi and thanks a lot for the valuable reply.
I was clearly completely out of track 😱 🙁
I have to keep on searching.
Regards, gino
 
Status
Not open for further replies.