Hi
I was thinking of learning some high speed discrete comparator designing in my spare time, what design can I start learning from?, what are the important design attributes when designing one, is there any real benefit in using a discrete version?
Why are people not designing class-d amplifiers using discrete comparators are ic packages to tough to compete against and more economically suitable.
I was thinking of learning some high speed discrete comparator designing in my spare time, what design can I start learning from?, what are the important design attributes when designing one, is there any real benefit in using a discrete version?
Why are people not designing class-d amplifiers using discrete comparators are ic packages to tough to compete against and more economically suitable.
You make a good but obvious point, sot-23 packages can also yield a small size in a design, The main question is this, how well can a discrete high speed comparator perform compared to a ic package
Discrete have speed issues due to lag of the components. They will behave well but not as efficient as a dedicated chip. Plus the expense.
UcD, nCore amps use discrete comparators, delay time- 100-200ns.
UcD scheme available all.
UcD scheme available all.
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Thanks ledsscp!
200ns isn't bad at all, this is something I will be looking at prototyping . 10 sot-23 transistors (for the comparators), x4 drive transistors for the fet driver.
cost reduction vs complexity is really showing in this design. Another thing its got all the bells and whistles over-current, snubbing, ferrite beads rather good design to start learning from.
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