How can I figure out if these pins are a I2S out?
Any idea where to get started?
Whole album: Firestone Bravo - Imgur
Thanks!
Any idea where to get started?
Whole album: Firestone Bravo - Imgur
Thanks!
the connector is not i2s, its a programming connection for the xilinx FPGA (maybe CLPD). theres no DAC to look up, its a USB and SPDIF convertor/reclocker by the looks of it. you'll be able to pick up the i2s on the tenor (if you have the datasheet or can pick the lines from other designs here on the forum) or on the WM8804, or a resampled output from the DIR9001.
the i2s from the tenor USB receiver probably isnt being passed to the WM8804, but you can get the i2s from the spdif there on
pin 12 -> Sdata (DOUT)
pin 14 -> Bitclock (BCK)
pin 15 -> Word clock (LRCK)
pin 16 -> master clock (MCK) but you could also alternatively take the master clock from the clock itself, or from pin 9, the CLKOUT pin.
but that nets you only the spdif, the DIR9001 is a mess IMO, its a pretty convoluted design for such a simple purpose, it seems as if it would have more jitter on the output than the input... so only take signal from that if you need it upsampled. its hard to tell from the pics if the spdif or i2s output of the tenor is being used, if you want the USB then I would try to just take it directly from the i2s outputs of the tenor and reclock it somewhere before or at the DAC end.
honestly though I dont see how you will get an improvement by using the i2s from this unit
the i2s from the tenor USB receiver probably isnt being passed to the WM8804, but you can get the i2s from the spdif there on
pin 12 -> Sdata (DOUT)
pin 14 -> Bitclock (BCK)
pin 15 -> Word clock (LRCK)
pin 16 -> master clock (MCK) but you could also alternatively take the master clock from the clock itself, or from pin 9, the CLKOUT pin.
but that nets you only the spdif, the DIR9001 is a mess IMO, its a pretty convoluted design for such a simple purpose, it seems as if it would have more jitter on the output than the input... so only take signal from that if you need it upsampled. its hard to tell from the pics if the spdif or i2s output of the tenor is being used, if you want the USB then I would try to just take it directly from the i2s outputs of the tenor and reclock it somewhere before or at the DAC end.
honestly though I dont see how you will get an improvement by using the i2s from this unit
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the tenor will be a bit difficult, the datasheet is under NDA so wont be listed online, but there are several designs here on the forum using the part and with some research you should be able to figure it out. a photo of under the board might help me see if they are using the spdif or i2s out from the tenor, a scope definitely would if you have one.
however if you are using the spdif input and want i2s output, you can use those pins for the WM8804 I listed above, its only if you need the USB that you will need to work it out for the tenor. looks like the easiest place to pic them up would be at those ferrite beads FB19, FB20, FB21, FB22
however if you are using the spdif input and want i2s output, you can use those pins for the WM8804 I listed above, its only if you need the USB that you will need to work it out for the tenor. looks like the easiest place to pic them up would be at those ferrite beads FB19, FB20, FB21, FB22
Oh wow. Great. Here is the picture for the bottom: http://i.imgur.com/Qf4WmT5.jpg
and here is the whole album:
Firestone Bravo - Imgur
So it looks like this board is using the WM8804 to feed the SPDIF out while the DIR9001 is being used to bring the SPDIF in. I'm trying to figure what this box actually does. It looks like it's using the PLL1707 as the audio clock. What I don't understand is why it needs the XLINK xc9572xl when the WM8804 already has reclocking abilities.
Can you tell what happens to the 5v from USB?
Thanks for all the help!
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