WM8805 doesn't work with TDA1543 in hardware mode?

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xiedidan

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Joined 2012
#1
Hi, I've set the WM8805 to hardware mode, with 16bit master mode I2S output.
When 192k/16bit spdif data is feed in, I measured the I2S output rates of WM8805:
BCLK=12.28M
LRCLCK=192K
Since 12.28M=2*192K*32, meaning the output is 32bits?😕

I read from the datasheet that in hardware mode, WM8805 generates 128fs MCLK with 192K input. And BCLK is 1/2 of the MCLK.
However, 12.28M is far more than TDA1543 could handle(9.2M).

Any way to make WM8805 work with TDA1543 in hardware mode?😛
 
#2
If you read the datasheet you'll find that 192k only works in software mode.

<edit> At least that's the way I read the datasheet but reading again it says in hardware mode that all input rates are supported. Which is confusing to say the least... 😛

PPS When I was working out how to use this chip, I recall reading that in hardware mode the BCLK is always 64X the sample rate - i.e. 32bits are clocked out per sample. The only way to get 16bits per sample (and hence 32X BCLK) was to use software mode.
 
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#3
abraxalito said:
If you read the datasheet you'll find that 192k only works in software mode.

<edit> At least that's the way I read the datasheet but reading again it says in hardware mode that all input rates are supported. Which is confusing to say the least... 😛

PPS When I was working out how to use this chip, I recall reading that in hardware mode the BCLK is always 64X the sample rate - i.e. 32bits are clocked out per sample. The only way to get 16bits per sample (and hence 32X BCLK) was to use software mode.
Click to expand...

Thanks abraxalito🙂

Yes BCLK is 64X the sample rate.

I'm still confused by the I2S format - datasheet says - 'Word length of 16, 20 and 24 bits are supported'. So 32 bits per sample is not supported, but we do get such output...😱

If I feed 192k/24bit into WM8805, will it still output 32bits per sample? (guess it adds 8 zeros at the end of each sample)😕😕
 
#4
xiedidan said:
I'm still confused by the I2S format - datasheet says - 'Word length of 16, 20 and 24 bits are supported'. So 32 bits per sample is not supported, but we do get such output...😱
Click to expand...

I think that must be referring to the formats of the SPDIF input - it can support up to 24bits (unofficially, I think that's part of the AES/EBU standard). 32bits per sample is not possible over either of these formats - there's not enough space 🙂

If I feed 192k/24bit into WM8805, will it still output 32bits per sample? (guess it adds 8 zeros at the end of each sample)😕😕
Click to expand...

Yes, that's my understanding - the 32bit frame will get zero padded.
 
#5
abraxalito said:
I think that must be referring to the formats of the SPDIF input - it can support up to 24bits (unofficially, I think that's part of the AES/EBU standard). 32bits per sample is not possible over either of these formats - there's not enough space 🙂



Yes, that's my understanding - the 32bit frame will get zero padded.
Click to expand...

Looks like I have to find an MCU for software mode then.😱😱
 
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