Over ethernet, omitting MCLK maybe🙄
A "Twisted P(ai/ea)r Interconnect", or I2S via TPI in short
Hi Russ,
I know you must be fed up with people asking this but it would really help me to know if you think the release of this USB device will be in days, weeks or months.
I know you must be fed up with people asking this but it would really help me to know if you think the release of this USB device will be in days, weeks or months.
My plan is to order boards for this my third board design By October. The rest of the schedule will depend very much on its success. 🙂
Last edited:
Will it be able to drive BIII in synchronous clock mode? e.g. MCLK from BIII to USB I2S.
Last edited:
Thanks Russ. So in this case the USB crystal quality can become more important than the one on BIII.
The key point is you need two master clocks for the two fundamental frequencies at the USB device.
Will it be possible (e.g. via some onboard headers) to use some really good clock later (e.g. ultra low phase noise SC-cut OCXO) for these two master clock frequencies?
Russ, I gather that part of this development includes creating drivers to support high-sample-rate transmission. If that is the case, (1) is support (i.e., drivers) limited to one or two O/S's? and (2) what about the future viability of this product as O/S's get upgraded or replaced? It seems like a potentially huge time sink for you or planned obsolescence for the owners.
- Status
- Not open for further replies.