Combining EF and CFP output stage
- By ACoombes
- Solid State
- 3 Replies
Hi Guys,
I am interested in designing an output stage to mitigate some of the high frequency crossover issues with the CFP topology. I have heard some mention of combining the CFP in parallel with an emitter follower stage.
Has anyone here used this in an amplifier before, how did you bias each pair of transistors and where there problems with one pair doing all of the work.
What are the best practices for designing with this stage?
I don't really know what I am doing but after some trial and error this is the general concept that I came up with.
I am hoping that this thread will lead to some interesting discussion, and if this has been talked about somewhere before please let me know.
Alex
I am interested in designing an output stage to mitigate some of the high frequency crossover issues with the CFP topology. I have heard some mention of combining the CFP in parallel with an emitter follower stage.
Has anyone here used this in an amplifier before, how did you bias each pair of transistors and where there problems with one pair doing all of the work.
What are the best practices for designing with this stage?
I don't really know what I am doing but after some trial and error this is the general concept that I came up with.
I am hoping that this thread will lead to some interesting discussion, and if this has been talked about somewhere before please let me know.
Alex