Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 Khz - Page 115 - diyAudio
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Old 29th January 2015, 05:51 PM   #1141
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Hi Soeren, congratulations for this incarnation of your dreams ... It's a beautiful work and promises a lot of fun. I will take it into operation with a WaveIO board. Actually I'm thinking about the structure of the power supply. Batteries are fine but not the best supply with regard to lower frequency noise. A carefully thought mains supply will do it. From my experience the interferences of the mains supply will have the biggest impact on sound quality of the DAC. It would be very usefull to find the schematics of the power supply and the grounding scheme for the next considerations. Thanks a lot for your work!
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Old 29th January 2015, 06:09 PM   #1142
zfe is offline zfe
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Are the pins "Iso RXD in" and "Iso TXD out" of J3 isolated versions of RXD/TXD pins of J10?
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Old 29th January 2015, 06:44 PM   #1143
Eldam is offline Eldam  France
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Quote:
Originally Posted by Eldam View Post
Could someone explain to me please in the SE spidf shematic Soren provides (I linked like Soren did the links in first page to open it fastly on the other thread as well) where the 1.2 V goes ?

On THE J2 1.2V ? Is this an input 1.2 V on J2.... I don't really understand what is the J2 utility ?

So J2, 1.2V pin to J3 IN- with a 1K R between. And between IN- and a J2 GND via I putt a 0.1 5 mm pitch legs MKT ?

Am I ok ?
"
So a two cents question as well : no problem to feed this 1.2V if SPIDF is connected to a device without playing (but switched on) while the USB entry is playing ? The FGPA will connect only the input where it sees a clock signal ? So I don'care if the LVMS for the SPIDF and the isolation chip for the USB are both powered as far as I don't inject in the same time two playing signals. It's to know if the DAM1201 can be connected to two different sources without deconnecting the wires !
Ah , I re read : Here is a schematic to show how to connect the SPDIF inputs. Please note that the FPGA LVDS Receiver need to be biased around 1.25V, convenient there is 1.2V available from the FPGA Core voltage at J2. "

How to manage the 1.2v took from J2 and manage gnd ground loop ?

Should i take the gnd from J2 as well and conect near the gnd on the other connector where the spidf flows ?
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Old 29th January 2015, 06:45 PM   #1144
soekris is offline soekris  Denmark
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Quote:
Originally Posted by Eldam View Post
Could someone explain to me please in the SE spidf shematic Soren provides (I linked like Soren did the links in first page to open it fastly on the other thread as well) where the 1.2 V goes ?

On THE J2 1.2V ? Is this an input 1.2 V on J2.... I don't really understand what is the J2 utility ?

So J2, 1.2V pin to J3 IN- with a 1K R between. And between IN- and a J2 GND via I putt a 0.1 5 mm pitch legs MKT ?

Am I ok ?
Sounds right, but you don't need a MKT, any ceramic will do. And you can connect GND to a GND closer to IN-.

J2 is a connector with all the power rails, for testing or for supplying (limited) power to other things....

Quote:
So a two cents question as well : no problem to feed this 1.2V if SPIDF is connected to a device without playing (but switched on) while the USB entry is playing ? The FGPA will connect only the input where it sees a clock signal ? So I don'care if the LVMS for the SPIDF and the isolation chip for the USB are both powered as far as I don't inject in the same time two playing signals. It's to know if the DAM1201 can be connected to two different sources without deconnecting the wires !
The INP_SLCT0 and INP_SLCT1 is for selecting input source, if nothing connected the dam1021 is in auto select mode where it scan the three possible input source for a signal. Be aware that even when not used the USB-I2S interface might output a clock that the dam1021 lock on to....
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Old 29th January 2015, 06:55 PM   #1145
Eldam is offline Eldam  France
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thanks Soren :

Do you advice me to take the Gnd from J2 or from J3 (I suppose take gnd on both connector is a bad idea ?)
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Old 29th January 2015, 07:12 PM   #1146
soekris is offline soekris  Denmark
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Quote:
Originally Posted by Eldam View Post
thanks Soren :

Do you advice me to take the Gnd from J2 or from J3 (I suppose take gnd on both connector is a bad idea ?)
Doesn't matter, all GND's are connected together to the GND plane. (Of course the ISO-GND's are connected to ISO-GND's only). Connect to what's convenient.
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Old 29th January 2015, 11:53 PM   #1147
soekris is offline soekris  Denmark
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Quote:
Originally Posted by SebastianL View Post
I thought that the Amanero was causing this, but I might be wrong. I have the same left/right mismatch.
I have checked the left/right and polarity:

Absolut polarity is correct.
Left/Right matches the connector, but incorrect on drawing.
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Old 30th January 2015, 02:21 AM   #1148
rol is offline rol
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Quote:
Originally Posted by pooge View Post
I see a potentially good demand for an input board to carry various input connectors and associated transformers and passive components.
Definitely.
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Old 30th January 2015, 02:26 AM   #1149
hsi68 is offline hsi68  South Korea
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Quote:
Originally Posted by pooge View Post
I see a potentially good demand for an input board to carry various input connectors and associated transformers and passive components.
Absolutely!
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Old 30th January 2015, 09:42 AM   #1150
Calvin is offline Calvin  Germany
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Hi,

finally got the DAC, but without any documentation so far.
I searched the whole thread, but there´s no clear description or diagram so far.
The diagram in #901 is not at all understandeable.
In the pdf SPDIF_Receiver won´t the 1.2V offset saturate the transformer?
Do the in+ in- belong to SPDIF1?

Seemingly the documenation from Soekris is not yet ready, but could You supply for a kind of quick start, because there seem quite some points not clear.
Or post the actual documentation revision, updating the file after progress.
For example the 3.3V and ISO-gnd Pins on J3. Are they required to supply the isolators?
Not everybodey is using an Amanero and not all USB-I2S converters supply 3.3V.
M2Tech for example supplies 5V for USB.
If the USB-I2S doesn´t supply for the 3.3V and gnd, where to get the supply from .. . J2´s 3.3V and gnd? But then the isolators won´t be isolated any more.

jauu
Calvin
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