Objectives have not changed. The main is to build balanced input cfa amplifier. If you think previous input design is viable than i guess we can compare the amplifier with two input designs, their pros and cons and pick the better one.
Th problem with original input design is doubled gain 45db with balanced signal feed and 26db with SE input. Obviously it can't be used as balanced in current state. I couldn't find a solution of this, if not consider the noise. Perhaps it's possible to make it working for the one who know how to do this but not for me.
Ian's rush pairs input design seem to be basically stable. However I couldn't run square wave sim with previous Mjona's setting and there was Spice error when I tried to ground cold input to test as SE.
Thanks AndriyOL for the reply.
So, when phase reaches -180° the gain has fallen to -25dB, right?
Best wishes,
M.
I gave the reference to Cordell's website where you can read his tutorials two months ago - there is a link to this in post 253.
Stability plots
The attached files have been modified to do most of the stability checks. The Zobel is used in all cases.
The 1st plot shows the open loop gain-phase with CL stepped to 1uF. The output inductor has been reduced to 5uH to show the variation in phase when CL is stepped. This was done SE and in closed loop (CL) the LF gain is 24dB. BTW I added a jumper to select SE and Balanced input.
To check stability put the cursor on the 24dB point and read the phase lag. The difference with -180 deg is the CL phase margin. Put the cursor on -180 deg and read the gain. The difference between this gain and 24dB (CL) is the gain margin which needs to be negative (attenuating), ie less than 24dB so it doesn't oscillate.
In the first plot I show the range of phase readings where the phase goes through 180 deg as CL is stepped; a range of 6 degrees less phase margin with 1uF compared to no CL. So it is stable for all CL's to 1uF
The 2nd plot shows the step response at the load and before the inductor (called "nfb") with CL stepped. Very little ringing appears at the nfb output. After the inductor the usual ringing appears with 220nF and above. So ordinary speakers (typically <1nF) will not cause ringing, only ESL's.
The 3rd plot shows the step response at "nfb" output with a fixed 200nF and the input level is stepped up to clip level. There is some ringing in the 9V to 36V range. Also at clip recovery has some sticking with the usual step, then on entering clip there are some wobbles that may need checking. Sticking after clip here is fairly good. Adding more damping with more compensation capacitance could help but usually increases THD values.
The 4th plot is like the 3rd but with a 20kHz sinewave. The pre-clip wobbles appear, and the post-clip sticking with some ringing as well. I would pass this amp as stable for clipping. Probably a real one using these values will need more compensation because of neglected inductance's in the power stage like track inductance's and capacitor ESL and ESR's. But still a good starting point to build unless someone can find some other issues.
Other changes were the removal of C36 & C37 on the Vbe multiplier; oscillation occurred with CL of 1nF and removing them stopped the oscillation (for all other CL's as well).
Also, I have left C20 in. It did not appear to cause cross-conduction issues in these tests but it may cause issues if the power stage emitter resistance's have high inductance like wire-wound ones, but MF may be OK.
An option to get practice is to integrate my changes into your file, then post yours as the latest version. Just a thought.
The attached files have been modified to do most of the stability checks. The Zobel is used in all cases.
The 1st plot shows the open loop gain-phase with CL stepped to 1uF. The output inductor has been reduced to 5uH to show the variation in phase when CL is stepped. This was done SE and in closed loop (CL) the LF gain is 24dB. BTW I added a jumper to select SE and Balanced input.
To check stability put the cursor on the 24dB point and read the phase lag. The difference with -180 deg is the CL phase margin. Put the cursor on -180 deg and read the gain. The difference between this gain and 24dB (CL) is the gain margin which needs to be negative (attenuating), ie less than 24dB so it doesn't oscillate.
In the first plot I show the range of phase readings where the phase goes through 180 deg as CL is stepped; a range of 6 degrees less phase margin with 1uF compared to no CL. So it is stable for all CL's to 1uF
The 2nd plot shows the step response at the load and before the inductor (called "nfb") with CL stepped. Very little ringing appears at the nfb output. After the inductor the usual ringing appears with 220nF and above. So ordinary speakers (typically <1nF) will not cause ringing, only ESL's.
The 3rd plot shows the step response at "nfb" output with a fixed 200nF and the input level is stepped up to clip level. There is some ringing in the 9V to 36V range. Also at clip recovery has some sticking with the usual step, then on entering clip there are some wobbles that may need checking. Sticking after clip here is fairly good. Adding more damping with more compensation capacitance could help but usually increases THD values.
The 4th plot is like the 3rd but with a 20kHz sinewave. The pre-clip wobbles appear, and the post-clip sticking with some ringing as well. I would pass this amp as stable for clipping. Probably a real one using these values will need more compensation because of neglected inductance's in the power stage like track inductance's and capacitor ESL and ESR's. But still a good starting point to build unless someone can find some other issues.
Other changes were the removal of C36 & C37 on the Vbe multiplier; oscillation occurred with CL of 1nF and removing them stopped the oscillation (for all other CL's as well).
Also, I have left C20 in. It did not appear to cause cross-conduction issues in these tests but it may cause issues if the power stage emitter resistance's have high inductance like wire-wound ones, but MF may be OK.
An option to get practice is to integrate my changes into your file, then post yours as the latest version. Just a thought.
Attachments
It work for me without Zobel as well and complies with Spladski' advise regarding stability without Zobel network.
I also think C36,37 and C14, C17 can be deleted, I can't see any change in simulation without them.
If you don't mind, a few things I would like to ask you.
What is a purpose of increasing R21 to R47 over R15? Your schematic works the same with 50V front end, if I'm not wrong, which is more practical than 60V.
As I see you are feeding the same positive phase signal into hot and cold inputs. Why not reverse one?
Do you know hot to measure gain balance of both inputs in Spice? In the schematic bias currents are not the same for hot and cold inputs (4.57mA, 4.47mA, 4.33mA, 4.33mA).
Also with such currents input transistors will be hot. Can we reduce them to 3.5-4mA and the amp remain stable, just to be on safe side?
What is an output resistance of this circuit?
Thanks.
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I agree, if possible it should be stable without the Zobel, including no load. There was a thread discussing the need for the Zobel and it seems it is mainly for the sake of speaker cables affecting the amps stability and if that is the case then it makes sense to have a Zobel at both ends of the speaker cable.
Definitely delete C36,C37 as mentioned since it/they caused oscillation with 2nF on the output. C14 may reduce HF noise from Q1 & Q20 so I'd leave it in just in case. C17 bypasses an electrolytic which is recommended; it may not show up in simulations as being useful because the electrolytic is not modeled with ESL and ESR and that's why you don't see any difference without C17. Other decoupling caps can be included so anyone making the amp will know that they should be included.
Not sure what you mean by "R21 to R47". R15 is an emitter degeneration resistor for the VAS. It provides thermal bias stability for the VAS which also affects the power transistors idle current.
To get it working properly with 50V auxiliary rails reduce R10=R11 to 1k5 so the zener's have about 5mA.
I hope not. My last circuit was set so the inverting input was fed with an inverted signal from E1 (set to a gain of -1). You can check this by clicking on the inverting input then the noninverting input after a run to display each input signal.
Place the cursor over the base of Q2 then Q3, the difference is the input bias current to ground. It mainly depends on beta mismatching in Q2 and Q3. But in closed loop there are a host of other things that affect the matching of Ic(Q2) and Ic(Q3).
The main mismatch appears to be the CCS's Q8,Q9 etc which means a trimpot is needed to trim out the DC on the output since the PNP's can't be matched to the NPN's. One option to get low DC voltage on the output without a trimpot is to use 0.1% resistors in place of the CCS's. I'll try this later.
As for reducing dissipation in the input transistors I don't see this is a serious problem for Q2,Q3 at 60mW. Note Q4,Q5 are not a concern --they are cascodes that act as series regulators to reduce the voltages on Q2,Q3 to +/-15V to keep them fairly cool.
I have reduced Q2,Q3 current to 3.4mA (attached) by increasing R8=R9 to 2k and reducing R41 to 1k (for the same output stage idle current), then R36 (across R9) to 30k to trim the DC on the output. This reduces the dissipation of the VAS from 1W per side to 350mW.
33m ohms at 1kHz. See attached circuit it has a current source added to inject 0.5A sine into output. Turn off the input sine, set the current source to 0.5A peak (no DC offset), Run, then measure Vout peak-peak. Rout=VoutPP.
Q1,Q20 should be placed on top of output devices, C14 will remain on PCB. If considering long wires connecting Q1, Q20 in the circuit, it still make sense to leave it than you are right.
Sorry, my typo. I ment R21 resistor with 47-15 Ohms.
Perhaps I miss something, but when I clicked on inverting and non inverting inputs after the sim run, they showed the same phases after the input resistors and opposite phases before the input resistors. Perhaps they should behave like this.
Regarding input bias mismatch, is there a way to balance bias currents of input transistors or it's not a problem a 0.24mA mismatch?
Fixed resistors in place of CCS is not a good idea, it was avoided in SSA thread. LC made a separate CCS add-on modules to replace such resistors. Simple Symetrical Amplifier
You are right, 60mW isn't too much for 300mw devices.
Is it possible to lower output resistance twice with some improvements?
I made some changes with input voltage, R11-10, C3, C35, C18, R21-23, deleted additional coil, Zobel and C36-37 caps. It seems stable enough.
As for input impedance mismatch, Spice shows -198.1uV vs 887.4uV on both input ends. In that case CMRR will be very low diminishing the benefits of balanced input of the amp. Is there any workaround to overcome this?
Sorry, my typo. I ment R21 resistor with 47-15 Ohms.
Perhaps I miss something, but when I clicked on inverting and non inverting inputs after the sim run, they showed the same phases after the input resistors and opposite phases before the input resistors. Perhaps they should behave like this.
Regarding input bias mismatch, is there a way to balance bias currents of input transistors or it's not a problem a 0.24mA mismatch?
Fixed resistors in place of CCS is not a good idea, it was avoided in SSA thread. LC made a separate CCS add-on modules to replace such resistors. Simple Symetrical Amplifier
You are right, 60mW isn't too much for 300mw devices.
Is it possible to lower output resistance twice with some improvements?
I made some changes with input voltage, R11-10, C3, C35, C18, R21-23, deleted additional coil, Zobel and C36-37 caps. It seems stable enough.
As for input impedance mismatch, Spice shows -198.1uV vs 887.4uV on both input ends. In that case CMRR will be very low diminishing the benefits of balanced input of the amp. Is there any workaround to overcome this?
Your query about R21 value:
Your original versions had 16 ohms with about 80mA. My recent versions have 47 ohms with about 30mA,
The new value of 47 ohms gives lower dissipation in each driver. The originals ~2W, latest ~1W.
Changing my version to 15 ohms gives 4W in each driver. I prefer the lower dissipation with 47 ohms.
This value usually affects the charge pull-out of the power transistors when there is capacitor is across it, but in this case it is not since C20 is present.
The value can be calculated uing R=2*0.7/I(R21) where the 0.7V ~ Vbe + 30mV. The 30mV is Olivers condition for optimum bias; with 10 ohm base resistors and 0.22 ohm emitter resistors you get about 15mV across each at about 60mA through each power transistor.
The value of 16 ohms was suited to base resistors of 2 ohms and emitter resitors of 0.1 ohms but now these values have been increased so R21 needs to be increased.
Re phase of inverting input signal at the input terminal and phase at the bases of Q12,Q13:
Yes, the phase is reverse on each side of the inverting input resistor (R16). This is normal for a differential amplifier. It is because feedback makes the voltage at the bases of Q12,Q13 as close as possible to the noninverting input. Since the noninverting input is in phase with Vin then phase at the bases of Q12,Q13 are also in phase with Vin.
Re bias currents in the input stage:
I assume this query arises from the need reduce the DC offset on the output.
With this Rush input stage the DC offset at the output can be as low as a few mV if 3 main conditions are met:
1) the beta's of the input transistors Q2,Q3 are within a few percent and are thermally strapped together,
2) the CCS currents are within 0.01% and thermally track each other to that degree,
3) Q21 tied to Q10, Q12 to Q3, Q13 to Q2, Q22 to Q11, and Q14 tied to Q15.
These thermal linkages are needed because you may get the offset to a few mV once the amp has warmed up but when you first turn it on the offset could be up in the sky, and then the only way is a servo and wait 5 seconds after turn on for it to zero before connecting the speaker. I notice your Post #1 shows many of these transistors already side by side and I assume you add a metal strap around each of the pairs.
I suggested using a 0.1% resistor instead of the CCS's (Q6,7,8,9) to possibly eliminate the need for an offset tripot.
I looked up the link you gave. I didn't see where Lazy Cat mentions the add on CCS's. I did see his initial concern over thermal stability and someone suggested using two terminal CCS's using DN2540's and two trimpots.
I did a simulation with perfect matched R's instead of the CCS's. The offset increased from 6mV with perfect matched R's to 60mV with 0.1% increase on one CCS. So if you want to get below 50mV on the output then you need the trimpot; for DIY amps this is not a serious issue. I was just curious whether it is possible to not use a trimpot because an engineer always thinks of production and how to avoid trimpots. Bear in mind for ESL's you need less than 50mV to avoid BH offset in the ELS's transformer, but for electromagnetic speakers 100mV offset does not hurt so it seems to me to be an viable option to use 0.1% resistors (which are not overly expensive) instead of the CCS's with no offset trimpot. Or with a 4 digit DMM you can match 2 pair to better than 0.1% even with a batch of 20 1% resistors.
I also checked the difference in THD at 1kHz and 20kHz with R's instead of the CCS's. The THD doubles in both cases. If you want check this then modify your circuit: add 4k32 resistors instead of the CCS's (Q6,7,8,9), add capacitors on both inputs (eg 100uF gives ~1Hz rolloff) since this helps balance the noninverting input current offset. And if you remove R12,R13 then increase R10,R11 to 2k2 for 7mA zener current (the LED's can go in series with R10,R11 if you need the LED's as indicators).
BTW your circuit of Post #510 did not have R8,R9 changed to 200 ohms, nor R36 to 30k. These reduce the input stage and VAS currents, as well as the power stage idle currents.
Re: lower output resistance:
At 1kHz it was 33mR. With respect to 8 ohms this is a DF of 240.
At 100Hz is 10.5mR and DF 760.
At 1kHz the DF is lower due to the reactive component of the output inductor so you can only lower the Rout at 1kHz by reducing the inductance and 5uH seems to me to be the lowest practical value to be stable up to 1uF on the output. Do you still want to make it lower than 33mR at 1kHz?
Your original versions had 16 ohms with about 80mA. My recent versions have 47 ohms with about 30mA,
The new value of 47 ohms gives lower dissipation in each driver. The originals ~2W, latest ~1W.
Changing my version to 15 ohms gives 4W in each driver. I prefer the lower dissipation with 47 ohms.
This value usually affects the charge pull-out of the power transistors when there is capacitor is across it, but in this case it is not since C20 is present.
The value can be calculated uing R=2*0.7/I(R21) where the 0.7V ~ Vbe + 30mV. The 30mV is Olivers condition for optimum bias; with 10 ohm base resistors and 0.22 ohm emitter resistors you get about 15mV across each at about 60mA through each power transistor.
The value of 16 ohms was suited to base resistors of 2 ohms and emitter resitors of 0.1 ohms but now these values have been increased so R21 needs to be increased.
Re phase of inverting input signal at the input terminal and phase at the bases of Q12,Q13:
Yes, the phase is reverse on each side of the inverting input resistor (R16). This is normal for a differential amplifier. It is because feedback makes the voltage at the bases of Q12,Q13 as close as possible to the noninverting input. Since the noninverting input is in phase with Vin then phase at the bases of Q12,Q13 are also in phase with Vin.
Re bias currents in the input stage:
I assume this query arises from the need reduce the DC offset on the output.
With this Rush input stage the DC offset at the output can be as low as a few mV if 3 main conditions are met:
1) the beta's of the input transistors Q2,Q3 are within a few percent and are thermally strapped together,
2) the CCS currents are within 0.01% and thermally track each other to that degree,
3) Q21 tied to Q10, Q12 to Q3, Q13 to Q2, Q22 to Q11, and Q14 tied to Q15.
These thermal linkages are needed because you may get the offset to a few mV once the amp has warmed up but when you first turn it on the offset could be up in the sky, and then the only way is a servo and wait 5 seconds after turn on for it to zero before connecting the speaker. I notice your Post #1 shows many of these transistors already side by side and I assume you add a metal strap around each of the pairs.
I suggested using a 0.1% resistor instead of the CCS's (Q6,7,8,9) to possibly eliminate the need for an offset tripot.
I looked up the link you gave. I didn't see where Lazy Cat mentions the add on CCS's. I did see his initial concern over thermal stability and someone suggested using two terminal CCS's using DN2540's and two trimpots.
I did a simulation with perfect matched R's instead of the CCS's. The offset increased from 6mV with perfect matched R's to 60mV with 0.1% increase on one CCS. So if you want to get below 50mV on the output then you need the trimpot; for DIY amps this is not a serious issue. I was just curious whether it is possible to not use a trimpot because an engineer always thinks of production and how to avoid trimpots. Bear in mind for ESL's you need less than 50mV to avoid BH offset in the ELS's transformer, but for electromagnetic speakers 100mV offset does not hurt so it seems to me to be an viable option to use 0.1% resistors (which are not overly expensive) instead of the CCS's with no offset trimpot. Or with a 4 digit DMM you can match 2 pair to better than 0.1% even with a batch of 20 1% resistors.
I also checked the difference in THD at 1kHz and 20kHz with R's instead of the CCS's. The THD doubles in both cases. If you want check this then modify your circuit: add 4k32 resistors instead of the CCS's (Q6,7,8,9), add capacitors on both inputs (eg 100uF gives ~1Hz rolloff) since this helps balance the noninverting input current offset. And if you remove R12,R13 then increase R10,R11 to 2k2 for 7mA zener current (the LED's can go in series with R10,R11 if you need the LED's as indicators).
BTW your circuit of Post #510 did not have R8,R9 changed to 200 ohms, nor R36 to 30k. These reduce the input stage and VAS currents, as well as the power stage idle currents.
Re: lower output resistance:
At 1kHz it was 33mR. With respect to 8 ohms this is a DF of 240.
At 100Hz is 10.5mR and DF 760.
At 1kHz the DF is lower due to the reactive component of the output inductor so you can only lower the Rout at 1kHz by reducing the inductance and 5uH seems to me to be the lowest practical value to be stable up to 1uF on the output. Do you still want to make it lower than 33mR at 1kHz?
Link in post #510 fixed.By the link I gave there is all mentioned in one page, please check the posts 2461, 2463, 2464, 2466, 2470.
As this is diy amp I also think trimpot is not the issue here, only sound quality matters. Wnen I listened to music with my current amp setup from post 1 with SE input it was possible to set the dc offset not more than 10mV flactuations without input transistors thermal coupling. Yes, from the power up the initial dc offset for the first 1-2 seconds was 200-250mV and maybe more when power down.
About Rout, this is not what I want, but what is possible to make it better. LC claimed in posts 2272, 2280 to have 5.6, 4.7mOhm Rout at 20KHz
As this is diy amp I also think trimpot is not the issue here, only sound quality matters. Wnen I listened to music with my current amp setup from post 1 with SE input it was possible to set the dc offset not more than 10mV flactuations without input transistors thermal coupling. Yes, from the power up the initial dc offset for the first 1-2 seconds was 200-250mV and maybe more when power down.
About Rout, this is not what I want, but what is possible to make it better. LC claimed in posts 2272, 2280 to have 5.6, 4.7mOhm Rout at 20KHz
I found the CCS in 2466. I missed the link to the circuit in Post 2455 here. It is a very stable CCS design. I assume from your bench tests you used the CCS's in the presents circuits (not the one in post 2455). Is that correct? If so, you are happy with it, from what you measured and mentioned.
No worries then about avoiding a trimpot (or maybe two?) for DC offset. And as you found no need for tight thermal linkages. When you add the Rush transistors you need to check this again.
Well, if you measure node "nfb" you can get ultra-low readings, I read 30u ohms at 1kHz (I haven't checked at 20kHz). What I'm wondering is whether he was using an inductor on the output and if he was did he measure the Rout before the inductor? The nearest circuit I could find to post 2272 was 2235 here with no inductor. Can you find out if he used an inductor and if so where he measured Rout?
Yes, I used the CCS from my schematic. Thermal coupling can provide even tighter dc offset fluctuations. Also LC used 1.5K NTC with 220R resistor for thermal stability and tracking of input transistors.
Rout at 20KHz should be even more higher than 33mR.
I think LC didn't use the inductor. It's visible in the latest schematic I added (not sure at which post it was published) and photos of built amp pcbs LC published in SSA thread, p166, posts 1657,1670. However, as you can see, the latest published schematic does not completely correspond to published photos of real build, for the capacitors at least.
Have you measured CMRR? What about input impedance mismatch, is it possible to equalize it?
About R8-9, R36 change, you wrote there is only 60mW load on input transistots, than no need to lower idle currents I guees and sacrifice performance.
Rout at 20KHz should be even more higher than 33mR.
I think LC didn't use the inductor. It's visible in the latest schematic I added (not sure at which post it was published) and photos of built amp pcbs LC published in SSA thread, p166, posts 1657,1670. However, as you can see, the latest published schematic does not completely correspond to published photos of real build, for the capacitors at least.
Have you measured CMRR? What about input impedance mismatch, is it possible to equalize it?
About R8-9, R36 change, you wrote there is only 60mW load on input transistots, than no need to lower idle currents I guees and sacrifice performance.
Attachments
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CCS temp sensitivity and amp CMRR
Do the same for the Vbe multiplier Q1 and Q20 using Tb. I read -80mA change so -8mA/C. So the CCS is half as sensitive as the Vbe mult and both have a -ve temp co. fortunately so the CCS can't cause thermally runaway, but it can significantly affect the optimum bias when the ambient temperature changes. In Australia we get 5C to 40C indoors (without the air con on), but you may be fortunate to have a much smaller variation indoors.
The THD change for a 10 deg ambient change was from 1.7 ppm (Iq=220mA 27C) to 3 ppm (Iq170mA 37C). This leads me to ask whether you want to add a NTC to lower the CCS temp co to maintain a more stable optimum bias? If so do you have any idea what part number Lazy Cat used for his NTC so we can plug in it's temp co (at say 27C) to check it out?
Note the DC on the output does increase with ambient temperature change of the CCS's which is not welcome. But since all the other transistors stay the same in this test there may be some mitigating effect to reduce this unwanted CCS change on the output DC offset. (Try changing the .Temp 27 to .Temp 27 37 with the other stepping off and you can globally step the ambient temperature to see what happens to the output DC offset).
Are you happy to leave the pursuit for lower Rout there? That means 33mR at 1kHz, since I assume you'll use a 5uH inductor.
I read -50dB up to 1kHz increasing to -20dB at 100kHz. Since the differential gain is 30 or +29.54dB the CMRR is about -80dB up to 1kHz rising to -50dB at 100kHz. I added an input filter to roll off at 300kHz since the inductor also rolls off 300kHz you get an overall f-3dB of 150kHz. I also added input caps for about 1Hz roll-off -- you can change these to suit your requirements. BTW the 50 ohm and 500 ohm resistors can be 47 ohms and 470 ohms in both cases (you must change all to maintain the CMRR) and use 1% resistors for these and R1 and R20.
With the values I used on the inverting and non-inverting inputs the input resistances to common are fairly well balanced. The reason for the 10 times higher R's on the inverting input is because feedback makes the inverting base node virtually the same as the noninverting base node. It means the input resistance of the inverting input is R16 (+R39) but the noninverting input resistance is R1+R2 (+R40) where the bracket R's are when the input filter is added. It also means the input cap's need to be scaled.
All these measurement methods are a good tutorial for anyone who designs a CFA (or VFA) power amp. I hope it's not too much at once.
I wanted to be sure that's the CCS so I could show some temperature sensitivity simulations. The CCS you are using is quite sensitive to ambient temperature since it uses Q7 and Q9 Vbe as the reference and this changes by ~-2mV/C. The attached capture shows the changes to do temp sensitivity simulations. Add the Temp=... to Q7-Q10 and the Temp lines on the top left. The upper CCS transistors (Q7,Q9) have "+d" while the lower ones have "-d" so you can step the differential temps of the upper and lower CCS's. Select one by uncommenting. Stepping Ta changes just the CCS junction temperatures by 10 deg C. The higher temp is first so you can probe the DC on the output and I(V7) for the change in idle current for instance. Subtract these from the original values at 27C. With 10C increase I read an idle current change of 45mA or -4.5mA/C and 33mV change on the output or 3.3mV/C. The differential temp sensitivity of the CCS's was a +15mV DC change on the output for the upper-lower changing by 0.1 deg C or 150mV/C! This shows the need for tight thermal tracking of in particular Q6 to Q7.
Do the same for the Vbe multiplier Q1 and Q20 using Tb. I read -80mA change so -8mA/C. So the CCS is half as sensitive as the Vbe mult and both have a -ve temp co. fortunately so the CCS can't cause thermally runaway, but it can significantly affect the optimum bias when the ambient temperature changes. In Australia we get 5C to 40C indoors (without the air con on), but you may be fortunate to have a much smaller variation indoors.
The THD change for a 10 deg ambient change was from 1.7 ppm (Iq=220mA 27C) to 3 ppm (Iq170mA 37C). This leads me to ask whether you want to add a NTC to lower the CCS temp co to maintain a more stable optimum bias? If so do you have any idea what part number Lazy Cat used for his NTC so we can plug in it's temp co (at say 27C) to check it out?
Note the DC on the output does increase with ambient temperature change of the CCS's which is not welcome. But since all the other transistors stay the same in this test there may be some mitigating effect to reduce this unwanted CCS change on the output DC offset. (Try changing the .Temp 27 to .Temp 27 37 with the other stepping off and you can globally step the ambient temperature to see what happens to the output DC offset).
I agree, the low readings quoted at 20kHz can't be obtained with an inductor in the usual range. BTW Did you check the "nfb" nodes output resistance I quoted was 30u ohms (0.03mR) at 1kHz? At 20kHz I'd expect 0.6mR (since it is related to the amount of nfb at 20kHz).
Are you happy to leave the pursuit for lower Rout there? That means 33mR at 1kHz, since I assume you'll use a 5uH inductor.
The attached capture shows changes so you can also sect "Vin" to test the CMRR. First use an AC run with the jumper on "Vin" for the inverting input.
I read -50dB up to 1kHz increasing to -20dB at 100kHz. Since the differential gain is 30 or +29.54dB the CMRR is about -80dB up to 1kHz rising to -50dB at 100kHz. I added an input filter to roll off at 300kHz since the inductor also rolls off 300kHz you get an overall f-3dB of 150kHz. I also added input caps for about 1Hz roll-off -- you can change these to suit your requirements. BTW the 50 ohm and 500 ohm resistors can be 47 ohms and 470 ohms in both cases (you must change all to maintain the CMRR) and use 1% resistors for these and R1 and R20.
With the values I used on the inverting and non-inverting inputs the input resistances to common are fairly well balanced. The reason for the 10 times higher R's on the inverting input is because feedback makes the inverting base node virtually the same as the noninverting base node. It means the input resistance of the inverting input is R16 (+R39) but the noninverting input resistance is R1+R2 (+R40) where the bracket R's are when the input filter is added. It also means the input cap's need to be scaled.
First R8,R9 are chosen for the current through the input Tr's, then R6,R7 set the VAS current, then R41 trims the idle current in the power transistors. I have not attempted to find the optimum idle current for the power stage for my latest changes, looks like the optimum (minimum THD at say 20kHz) is with more than 220mA though V7. I'll leave that for you to find.
All these measurement methods are a good tutorial for anyone who designs a CFA (or VFA) power amp. I hope it's not too much at once.
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I wrote about my current CCS in a short time measurements. I agree it could be unstable with temperature variations. NTC was used for input transistors bias tracking, not for CCS. It's on page 225 with datasheet. If it would be used for CCS, than perhaps better to use LC CCS design? Additional info about CCS on page 295. On page 301, Sonnya claimed to have less than 2mOhm of Zout at 20KHz.
Our CMRR numbers aren't good for balanced input amp. Frankly speaking, I'm not happy with such specs. Maybe we should go with simpler beter specs SE design. What are your thoughts?
Our CMRR numbers aren't good for balanced input amp. Frankly speaking, I'm not happy with such specs. Maybe we should go with simpler beter specs SE design. What are your thoughts?
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There was similar Bal. design guided by LC and was supposed to be built but I haven't been able to find a reported results later on in the thread.
http://www.diyaudio.com/forums/solid-state/193923-simple-symetrical-amplifier-165.html#post2810098
I tried to simulate it, however it produced the same distortion as previous one.
http://www.diyaudio.com/forums/solid-state/193923-simple-symetrical-amplifier-165.html#post2810098
I tried to simulate it, however it produced the same distortion as previous one.
Thanks for the data. I read LC was after near constant VAS current since the VAS current affects the power stage idle current. In this input stage Rush version the VAS is temperature sensitive mainly from the Vbe resistors R6,R7 for the VAS, since the Rush input stage is temperature compensated already by the diode string (Q12,13,21,22). My preferred method for temp comp of the VAS would be a trans-diode in series with each Vbe resistor thermally linked to Q14 (Q15) like I show here. Try 150 ohms. I can find the best values for the Vbe resistors if you get stuck.
I am not happy with the present CCS type due to it's high temp co and the DC offset is affected by miniscule differences in the PNP/NPN Is parameters. LC's CCS is good in both respects. Do you have all the models for the devices?
Again, we must assume there is no inductor. Your circuit without an inductor was lower. Is that sufficient for you?
You are not making sense, at least to me. A SE doesn't have any CMRR so how could returning to SE be an improvement? Also 80dB CMRR isn't that bad, is it? I don't have experience with balanced input power amps so I don't know what sort of CMRR you need.
Maybe someone can give figures for what CMRR is required in a typical home amp setup, I assume fed from a DAC via a metre or two of shielded cable?
I'm sorry, I don't get it, why would we need to change Vbe resistors to 150Ohm?
. No. Do you think it might not work as declared?
Do you mean on nfb or on out node?
Ideally CMRR should be infinite, practical values are 95-140db but for DC voltage.
Spice shows Ad value -23.4db, Acm value -37.5db for 20KHz input. In theory Ad shoud be many times higher than Acm. How do you calculate 50 or 80db?
If SE will have better or the same noise pick up as balanced, than no need to complicate the design without a benefit. However, some people claim balanced interface improves the sound much, except noise rejection feature.
Interesting article I found for balanced input. Balanced Interfaces
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