AD1865 the best DAC

[audiodesign]

Sampler,
Your note has been copied on the other forum:
192KHz 24bit DAC No oversampling and No digital filter

[josiphal]

Originally Posted by sampler

That is the problem (according to kaameelis), channels not latching at the same time and creating fractional delay between L and R outputs.

It's clear to me, and I wrote this.

Originally Posted by sampler

Even better universal shifter. Just what I had in mind. Tested this one in MultiSim, it's 100% working. This can be used interfacing 1865 to any form of I2S, as well as aligning data from 8414. One just needs to figure out required amounts of data shifting, which depends entirely on source I2S format.

This is the same thing, and it was published for the first time with Rockna DAC schematic. Don't understand why you need MultiSim testing because it was tested in real word and it's working OK. I tested long time ago (diyhifi.org thread) and it is working with AD1865 with EIAJ/I2S input (without CS).

[sampler]

Originally Posted by kaameelis

Or 74HCT374 as from thread: EIAJ to I2S (and vice versa)
(needed login to see attachments)
Existing also one chip 32 bit shift registers (4517 and 4557 from different producers) but they are slow, max clock about 2-6 MHz at 5V supply voltage. But who knows, maybe can also work as NOS DACs has clock about 2.882 MHz?

Yes, there are lots of ways doing the same thing. Should work with all of them, at least with 2.822 Mhz clock for 44.1k. I would vote for ACT164, because first it's seems to be successfully tested, and second having worked with them at some point, I can confirm how quick they are. With 100Mhz analog scope, you couldn't see rising/falling edges of output signal, till some 1Mhz. Just a way I like it

Originally Posted by josiphal

This is the same thing, and it was published for the first time with Rockna DAC schematic. Don't understand why you need MultiSim testing because it was tested in real word and it's working OK. I tested long time ago (diyhifi.org thread) and it is working with AD1865 with EIAJ/I2S input (without CS).

Ok, I see. Didn't followed that threads, sorry....
Maybe you have a working link to Rockna DAC schematics ? Theirs site have been updated, couldn't find one.

[josiphal]

Originally Posted by sampler

Yes, there are lots of ways doing the same thing. Should work with all of them, at least with 2.822 Mhz clock for 44.1k. I would vote for ACT164, because first it's seems to be successfully tested, and second having worked with them at some point, I can confirm how quick they are. With 100Mhz analog scope, you couldn't see rising/falling edges of output signal, till some 1Mhz. Just a way I like it

HC164 is fast enough, and it's working OK. Anyway, faster logic can be used, but there is no need for this.

Originally Posted by sampler

Ok, I see. Didn't followed that threads, sorry....
Maybe you have a working link to Rockna DAC schematics ? Theirs site have been updated, couldn't find one.

Schematic not exit on site anymore. It is attached on diyhifi.org thread, so you can find it there.

[sampler]

Had some spare time to play with MultiSim again. Found couple mistakes I made. First - shifting must be done for Left channel data, as it comes first in a sample, otherwise you are shifting Right channel data to other sample and in the end, have the same output delay between channels. Second - HC74 or similar flip flop must be added, to shift another 0.5 sck (thanks for the link Josiphal). This is because data is clocked from 8414 on the falling edge of sck, and HC164 locks it on rising edge of sck.

Below I will attach schematic and timing diagram for proper 8414 and 1865 interfacing. This is just my approach, could be done in a few other ways. Couple notes on this one: U2A, U2B, U2D separates data, U2C inverts latch signal. U3B, U3C 2X delays clock, as data is also 2x (or 3x if in out phase) delayed, to keep the sync. With 4XHC164 + HC74 Left data is ~39ns out of sync according to multisim. Everything else is already discussed. Again, I personally would use ALS logic, just to be on the safe side


Looked at RocknaDAC interface schematics, maybe more elegant solution using RST for data separation, but this is using 9 IC's in total

[vzs]

Originally Posted by sampler

You made me took out my dusty calc from drawer and… well using 44.1k sampling, 1 sck cycle is 0.35us, so for 32 sck there is 11.34 us delay, right….
That is IF each DAC channel is updated separately, which seems to be this way, according to 1865 datasheet.
Now I have done some testing on Steinberg WaveLab. Cutting right channel of 44.1k WAV precisely 0.01ms (maximum resolution). What can I say… can’t hear any difference That is using ESI Juli@ and HD650’s. Maybe it’s time to see my doctor

In summary, yes – there is a “bug”. But is it audible ? I think everyone must decide for him self.

It's interesting to calculate how much the sound travels in 11.34us: with 331m/s it travels approximately 0.37cm, so if I place my ears 0.18cm to the right it will equal the 11.34us delay. I doubt that anybody could tell the difference

[audiodesign]

Originally Posted by vzs

It's interesting to calculate how much the sound travels in 11.34us: with 331m/s it travels approximately 0.37cm, so if I place my ears 0.18cm to the right it will equal the 11.34us delay. I doubt that anybody could tell the difference

[regal]

Originally Posted by vzs

It's interesting to calculate how much the sound travels in 11.34us: with 331m/s it travels approximately 0.37cm, so if I place my ears 0.18cm to the right it will equal the 11.34us delay. I doubt that anybody could tell the difference

Hey, I take offense, manny of us are headphone enthusiasts. With the driver .1cm from the ear.

[sampler]

Originally Posted by vzs

It's interesting to calculate how much the sound travels in 11.34us: with 331m/s it travels approximately 0.37cm, so if I place my ears 0.18cm to the right it will equal the 11.34us delay. I doubt that anybody could tell the difference

Yes, exactly, I was too lazy to do more math

But again, it would be interesting to see if there could be any improvement/degrading in sound reproduction using tube output stage and some Hi-Fi headphones. As with speakers it would be quite absurd to notice anything

For me it was just a good exercise before making I2S interface to my transport.

[vzs]

Originally Posted by regal

Hey, I take offense, manny of us are headphone enthusiasts. With the driver .1cm from the ear.

You might be right thought I have to check smtg:
I found this nice article about: sound perception and later today I will get a free Matlab and try to play with some wavs. I will post my findings then.