TDA1541 info

[guido]

Originally posted by Bernhard
Never heard that rising time of logic input can be too high.
Only about problems if they are too slow.

Logics have a L to H switching point like 3,5V and H to L like 1,5V for best noise immunity.

Hi,

rising time is too FAST.
And the for the TDA it appears to be: low=1.2, high is 1.4 volt.

Pedja,

In the datasheet all three supply voltages are stated with their supply voltage ripple rejection. Does this not state that they are all three used for the analog output ??

mvg,

[guido]

Originally posted by guido

And the for the TDA it appears to be: low=1.2, high is 1.4 volt.

Oops, low=1.3, high=1.5

[till]

And do you have an idea how to convert 0-5 to 1.3-1.5 (or 1.2-1.6)?
I tried to do somethink with 3 resistors (a series resistor, one from Vcc and one from GND), but this won't work, and would draw way too much currenta

so you formed a voltage divider for about the middle of the 2 voltages desired and tried to modulate this middle point with the signal.

what about between the two resistors forming the voltage divider a transistor. the transistor is biased so it is about open, the voltage divider shows one of the both voltages we need. and the base the the signal is modulating the transistor.

This could also make a fine circuit to feed an inverted and a noninverted signal without time difference into balanced DAC. One taken at emitter, one at collector.

[till]

rising time is too FAST.

yea, but the big question is: in what way should that take effect on the DAC? (sound like blue led sound)

Should be easy enough to put a resistor + capacitor in the signal line.

[Bernhard]

Originally posted by guido
rising time is too FAST.
And the for the TDA it appears to be: low=1.2, high is 1.4 volt.

Rising time of what chip ?

Signal swing is between 1,2 and 1,4 V ?

Datasheet say it is TTL compatible.

[Pedja]

Originally posted by guido
In the datasheet all three supply voltages are stated with their supply voltage ripple rejection. Does this not state that they are all three used for the analog output ??

Hmmm, funnily enough, it does.

Though the numbers tell that -15V is the real analog supply, +5V is notably less analog supply and -5V is even more less analog supply (maybe crosstalk? <- joke).

I think I will proceed to threat them like before.

I think we should cook up a circuit and just try it. If it works, great.
If it does not improve the sound, we just forget about it.

Fine with me.

Pedja

[Pedja]

Originally posted by Pedja
“A significant factor is the *low* frequency rolloff of the transmission medium shifting the level of the transition points.”
http://www.audioasylum.com/audio/twe...ges/30411.html

I should look better when I am linking something. It is not the post that I wanted to refer to, actually the sentence I quoted (“*low* frequency rolloff) is ambiguous and in one sense perfectly applies if you understand it as lpf with too low roll-off frequency. Unfortunately I can not find the post I had on my mind (it was IIRC wildmonkeysects’s one), I’ll post the link if I find it. Sorry.

[Bricolo]

Originally posted by till


so you formed a voltage divider for about the middle of the 2 voltages desired and tried to modulate this middle point with the signal.

what about between the two resistors forming the voltage divider a transistor. the transistor is biased so it is about open, the voltage divider shows one of the both voltages we need. and the base the the signal is modulating the transistor.

This could also make a fine circuit to feed an inverted and a noninverted signal without time difference into balanced DAC. One taken at emitter, one at collector.

I'll try this

One solution I was thinking about was to use a transformer, and place the output 2 diodes drops above ground.

[HtP]

The digital inputs of the TDA1541(A)

The digital inputs are pnp differential stages, the reference voltage made by two forward biased diodes. this gives a reference voltage of about 1.4V. you can measure this your self by measuring the change in current of the digital inputs as function of input voltage. The input current will be half if the input stage is at ballance.

Reqiured swing for this input stage is 200mVpp around bias, for safety 400mVpp.

The base of a pnp in this bipolar process is juction isolated to the substrate, the input capacitance is therefore mainly to the substrate. Fast and large digital input signals cause capacitive currents in the substrate. Thes can be lowered by making the input signal not larger and not faster than needed.

Thus not larger than 400mVpp around bias.
Not faster than 10 to 30nsec rise time. This rise time is already faster than required is the ft of the pnp is taken in acount. A lateral pnp is in this process not faster than 10MHz, a vertical pnp slightly faster.

You can make these signals with a resitive divider from your digital source to a bias voltage of also two forward biased diodes. Use 1 mA in the diodes. Reduce the speed og the input signal for the TDA1541(A) with a capacitor of say 10pf, to digital ground. Make this circuit separate for each active input.

Do not use transformers or active circuitry, this will cause data dependency of the delay.

Please take notice that pasive delay itself does not cause jitter.

Please take notice that if the input rise time is fast enough, no additional jitter is introduced.

regards,

[guido]

Hi,

I already had the impression you were reading this... .
Thanx for taking over!

Could you also make some more statements on the +5 and -5 supplies? And decoupling between -5 and +5? Easier doing it here than me copying answers etc..

Thanks for your patience on answering my mails (>10) and replying to my criticial mails