Hi,
I am mailing with someone who seems to know all the ins and outs of the TDA1541(A). Discussing DEM reclocking and other things, guess you know who it is now.
According to this source, the powersupply pins are used for:
quote "-5 = analog AND digital supply"
quote "+5 = analog AND digital supply"
As you can see -15 is not known to me yet (for now i guess it is analog, but i need confirmation).
For the -5 and +5, they need to be decoupled to ground. Since a voltage difference between agnd and dgnd appears on the output of a DAC, my guess would be to decouple to dgnd direct. The currents through the trace between dgnd and agnd from the decoupling would then be from the analog side. I would think they are less harmfull as digital currents.
quote "More important than decoupling to gnd is that -5 and +5 are decoupled to each other"
I'm not shure it is enough to have '+5 cap gnd cap -5 ' or that one extra cap is better. This creates some kind of triangle.
opinions ?
quote "the DEM decouple caps should go to analog ground" as expected.
There are more "quotes" expected to follow, on the -15 and interesting stuff on driving the i2s inputs! I will post if i have all the information Gimme a few days!
Regards,
I am mailing with someone who seems to know all the ins and outs of the TDA1541(A). Discussing DEM reclocking and other things, guess you know who it is now.
According to this source, the powersupply pins are used for:
quote "-5 = analog AND digital supply"
quote "+5 = analog AND digital supply"
As you can see -15 is not known to me yet (for now i guess it is analog, but i need confirmation).
For the -5 and +5, they need to be decoupled to ground. Since a voltage difference between agnd and dgnd appears on the output of a DAC, my guess would be to decouple to dgnd direct. The currents through the trace between dgnd and agnd from the decoupling would then be from the analog side. I would think they are less harmfull as digital currents.
quote "More important than decoupling to gnd is that -5 and +5 are decoupled to each other"
I'm not shure it is enough to have '+5 cap gnd cap -5 ' or that one extra cap is better. This creates some kind of triangle.
opinions ?
quote "the DEM decouple caps should go to analog ground" as expected.
There are more "quotes" expected to follow, on the -15 and interesting stuff on driving the i2s inputs! I will post if i have all the information
Gimme a few days!Regards,
Hi Guido,
But I would not be surprised if the analog part partially uses +5V.
As about the claim for -5V I would like to know more about your source.
The -15V is surely the analog supply and simple measurement of voltages on the decoup pins will tell you why.
And it is because...?
Pedja
Both -5V and +5V are the digital supplies and this conclusion can be made from the fact you set the mode using +5V and –5V (and gnd).guido said:
But I would not be surprised if the analog part partially uses +5V.
As about the claim for -5V I would like to know more about your source.
The -15V is surely the analog supply and simple measurement of voltages on the decoup pins will tell you why.
quote "More important than decoupling to gnd is that -5 and +5 are decoupled to each other"
And it is because...?Pedja
ZERS said:
yes, or better: on the groundplane
see here:
http://www.tentlabs.com/Info/Articles/Supply_decoupling.pdf
Hi,
More info coming:
Think it is obvious where i get the info from (read some other posts..), but i dont want him to get tons of mail because of this post. He is kindly replying all my mails and i did sent quite a few, sometimes even giving critics. But i promised him a 'vlaai' at the dutch diyaudio day, that might have done the trick....(dunno yet if he is there)
Anyway, more quotes.
"-15 is for current reference, dem oscillator and ringcounter. This is completely analog". As expected.
There is much more detail in his posts, so it seems he knows the insides really well. If he says +5 and -5 are used for dig and analog, i believe him. Seems to know more than enough to also know this. And why would he give wrong info ?
And now for something new
quote "The digital inputs have a biaspoint of 1.4 volt. To have them read a 0, going down to 1.3 volts is enough (so not 0). Reading a 1 is done with 1.5 volt already (not 5). Building something that is putting the I2S signals with these voltages on the DAC I2S inputs will bring down the distortion and get the best performance out of the TDA1541."
Also important is that the inputs can only handle a certain speed of the digital changing state. Faster logic is not going to give better performance, the inputs cant handle it anyway.
quote "Use a RC filter with an RC time of 10 to 20nSec to slow down the digital signals changing state. C goes to dig ground (obvious) and use high enough impedance"
So who of the analog guru's here could come up with the above?
Greetings,
More info coming:
Think it is obvious where i get the info from (read some other posts..), but i dont want him to get tons of mail because of this post. He is kindly replying all my mails and i did sent quite a few, sometimes even giving critics. But i promised him a 'vlaai' at the dutch diyaudio day, that might have done the trick....(dunno yet if he is there)
Anyway, more quotes.
"-15 is for current reference, dem oscillator and ringcounter. This is completely analog". As expected.
There is much more detail in his posts, so it seems he knows the insides really well. If he says +5 and -5 are used for dig and analog, i believe him. Seems to know more than enough to also know this. And why would he give wrong info ?
And now for something new
quote "The digital inputs have a biaspoint of 1.4 volt. To have them read a 0, going down to 1.3 volts is enough (so not 0). Reading a 1 is done with 1.5 volt already (not 5). Building something that is putting the I2S signals with these voltages on the DAC I2S inputs will bring down the distortion and get the best performance out of the TDA1541."
Also important is that the inputs can only handle a certain speed of the digital changing state. Faster logic is not going to give better performance, the inputs cant handle it anyway.
quote "Use a RC filter with an RC time of 10 to 20nSec to slow down the digital signals changing state. C goes to dig ground (obvious) and use high enough impedance"
So who of the analog guru's here could come up with the above?
Greetings,
What is very important is if you want to build anything meaningful in the audio is not to make conclusions this way. There is none that deserves unreserved trust.
Answering this question might bring us very far from where we are. I certainly have not claimed he is giving (and you are forwarding) the wrong info. I however, did asked two other questions which could/should be answered without going out of the audio.And why would he give wrong info ?
The first thing is new for me, however the sweeping sound of the "... will bring down the distortion and get the best performance out of the..." statement hurts a bit my ears. (Please, do not tell in your next post that I have told it will not.)And now for something new
quote "The digital inputs have a biaspoint of 1.4 volt. To have them read a 0, going down to 1.3 volts is enough (so not 0). Reading a 1 is done with 1.5 volt already (not 5). Building something that is putting the I2S signals with these voltages on the DAC I2S inputs will bring down the distortion and get the best performance out of the TDA1541."
Also important is that the inputs can only handle a certain speed of the digital changing state. Faster logic is not going to give better performance, the inputs cant handle it anyway.
quote "Use a RC filter with an RC time of 10 to 20nSec to slow down the digital signals changing state. C goes to dig ground (obvious) and use high enough impedance"
So who of the analog guru's here could come up with the above?
The two other things are well known and are floating around for some time. I am neither analog nor digital guru but know them. As many others do.
Pedja
Tda1541a info
hi,
I had some detail TDA1541a info from the philips factory when I design the parallel TDA1541a D/A board.
its a PDF format approx 60~70 pages.
Anyone who had interest pls email to me.
I zip already & will email to him.
hope this can help U.
this is my email.
thomas@diyaudiocraft.com.
thanks
thomas
hi,
I had some detail TDA1541a info from the philips factory when I design the parallel TDA1541a D/A board.
its a PDF format approx 60~70 pages.
Anyone who had interest pls email to me.
I zip already & will email to him.
hope this can help U.
this is my email.
thomas@diyaudiocraft.com.
thanks
thomas
Attachments
Pedja said:
Hi,
First a 'confession'... The story on the biaspoint is very technical and i "translated" that into 'best performance'. Should not have done that using the word 'quote'. I have to translate from Dutch anyway.
A more technical anwer was given on the improvements, have to translate from dutch:
Suppose you take some marging by using 1.2 and 1.6. This would give 20dB less distortion (trying to translate 'storing', storung in German.) than 0-5 volt. Using RC filter of 10 or 20nSec will give the least ammount of distortion in TDA. Connect C to dig gnd. I garantee you will hear the difference.
I'll ask about the +5 and -5 and the decoupling cap. Maybe the doc from thomas will give the info also. It is easter so might take some time.
That faster logic isn't always better is indeed 'common knowledge'. Read: use the slowest logic possible.
But i have not seen ANY design using RC filter of 10nSec to "slow down" the I2S signals to a speed that the TDA1541 can handle!
Maybe the 8412 or 8414 outputs have slow slopes already ??
Zalig Pasen en bedankt voor die bloemen!!!
GuidoB
I must say I do not really believe in some simple and strong relation between the harmonic distortion and the subjective quality, but does this mean, once you achieve the threshold, the distortion is inversely proportional to the level on the I2S line (0.4V is relatively close to 20dB below 5V)?guido said:
Note that the data from datasheet in essence say that 1541 “normally” uses the potential of 16bit format (THD+N).
Does that slow down the signal so 1541 “can handle” it, or it just low passes i.e. filters it? It is sometimes done using residual input’s capacitance. With most often used 100R and TDA’s input capacitance of 12pF, the time constant is 1.2ns. Less than proposed by your source, but to clarify the suggestion, 20ns RC constant = low pass filter with cut-off (-3dB) frequency at about 8MHz (the maximum frequency/bitrate for 1541 per datasheet is 6.4MHz). And you should then really consider jitter, no?
“A significant factor is the *low* frequency rolloff of the transmission medium shifting the level of the transition points.”
http://www.audioasylum.com/audio/tweaks/messages/30411.html
Happy Easter to you too.
Pedja
Pedja said:
Sorry, this is distortion (still unclear if this is the correct translation) introduced into the input stage. How this translates into distortion numbers measured on the output i dont know.
Statement is only that it is clearly audible. The "quotes" are telling the way the input signal is handled 'best'.
E.g. Use normal logic voltages and the input circuit still works (we all know that), but it does not work 'best'.
I think that it has something to do on how BCK signal is read into the TDA. Maybe jitter more jitter is introduced BY the input stage if signals are 0-5 instead of 1.2-1.4 on reading BCK.
I think we should cook up a circuit and just try it. If it works, great.
If it does not improve the sound, we just forget about it.
I compare it with DEM reclocking
Groetjes,
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