zen v1 build problems????

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Magura said:
That is not much for two channels. You are going to dissipate close to 300W of heat, if you stick to the 0R22, as in 3A bias.


I used something like 6 or 8 times that, and still I had it running at the wrong side of good.
Magura :)

I think you need to turn the bias down by x2 or even x4 until you get better heatsinks. Mebbe 1 ohms for the bias setting resistor (up from .22/.33)
 
well i still have the question as to why im getting voltage in the 30's to the gate of q2
im being told that its ok but im thinking there is a reason why mr. pass said it is supposed to be 4 volts to the gate of q2. im thinking q2 is going into overdrive because of the gate voltage. what do you think?
 
I just looked at the IRFP9240 datasheet
http://www.irf.com/product-info/datasheets/data/irfp9240.pdf

Two things pop out:
Maximum source-gate voltage is 20V. You measured 0V on the gate which means you blew out the gates.
The gate threshold voltage i.e. where the FET turns on is -4V. You measure this from gate to source (not gate to ground)

But you've got one channel going well?
 
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