andy_c said:
Andy,
You are entirely correct in assuming the opamp models are not good for simulating the supply current and the app note you quoted explains this in great detail. AD models are at least trying to do something about, but (e.g.) most of the TI models are not even attempting to model the supply current. I think it's fair to assume that such a front end (and the Alexander current feedback amp that it is based on) can't be accurately simulated by Spice, unless one has some accurate circuit level opamp model (instead of a macromodel).
The opamp side of the front end has a gain of 2. I have tried lots of opamps in this role, AD8065, THS4601, AD797, OPA132, OPA627, OPA211, OPA827, etc... The only opamp that I have in my collection that was a good tradeoff (in terms of distortion, speed, offset, input bias, etc...) was ADA4899-1. The only small issue is a slightly large bias current which makes for an about 30mV output offset. Of course I could make this zero by connecting the servo input to ground, but I though it would be nice to be able to connect the amp in DC (that is, without the input cap) as an option. Anyway, in the latest board version I made provisions for jumpering the board for DC or AC coupling (not sure if I'll send this for manufacturing anytime soon, though).
Another source of gross errors is the medium power japanese models. Although I did my best, the 2SA1407/2SC3601 model are still very poor for any AC or time dependent Spice analysis. For cost reasons only, YAP does not use this pair, but the very cheap KSA1381/KSC3503 from Fairchild (although the OPS schematic may not reveal this). The models for these devices are pretty good! Enough to say that the input OPS impedance is (measured, not very precise, but as a good estimate) about 3000k and 4pF and of course this impedance greatly impacts the front end open loop gain. In practice though, there is no measurable difference between the performance with KSA1381/KSC3503 and 2SA1407/2SC3601.
Edmond Stuart said:
250mA is close enough
Anyway, I suspect I may need to go a bit larger then 0.1 ohms for RE for better Iq sharing in the 20 output pairs for each channel bolted to each side of the vertical 1100mm X 230mm X 150mm fan forced heatsink tunnel.
However my dissipation capability is huge and with so many output devices I have just silly high gm, so I can easilly give a little up a little of the latter if required and still be miles in front in terms is gm doubling distortion into any practical or sane load impedance.
The 4kVA series pass requlator module is currently going togeather (machine shop working on my metal work).
Unfortunatly it looks like it will be finished in summer, which is predicted to be another +40deg C stinker
Back to YAP now............
Cheers,
Glen
syn08 said:
We all know this already, but you missed the point. Generally, op-amp models underestimate the distortion. In case of YAP, the distortion is greatly overestimated. Obviously, this has nothing to do with bad op-amp models. RTFP, please.
I hope you will install two jumpers, one for bypassing the cap and one for connecting the servo input to ground.
"may not reveal this"
First, we were misled by wrong gate stoppers (they are still wrong btw). Now this error. Don't you realize that you are waisting our time by not 'revealing' the real schematic.I'm waiting for the next thing that has to be 'revealed'.
Using KSA1381/KSC3503 models, things get better. OPS-THD20=16.5ppm, more in line with your results (20ppm).
But the overall distortion is still ten times higher (15.5ppm) as it should be. Using Andy's BAV21 model, it drops to 13.5ppm.
Indeed, the input impedance of the OPS is about 3Meg and 4pF. And, as you said, it has a great impact on the performance, as the output impedance of the front-end is also very high. That's precisely the reason why this tiny 4pF, being the nonlinear Cob of the next stage, spoils the amp. If you don't believe me, simulate it by yourself and look here how to eliminate these nonlinear capacitances.
Hi forr,
back home after a journey, responding to this topic at the risk of repeating myself.
The significance of harmonic spectrum was noticed already in the twenties, when the first "THD" measurements were executed and brought out in every discussion worth a mention, however usually not related to the aural distortion pattern, which admittedly can appear as an unorthodox reference. Although subjective preferences point in that direction, I am not saying it`s the main issue. Nevertheless, hearing is not linear.
(The nonlinearities of hearing have been known for over hundred years, reinforced by continual, intensive worldwide research, providing information, in example, about the audibility and offensiveness of distortions. The nonlinearities originated in the compression occuring in the outer hair cells of the cochlea and can be seen as a sacrifice in order to achieve a desirable large dynamic range for the main purpose, videlicet detection).
Harmonics, or in musical context overtones, entirely determine the characteristics of every sound, (however unlike harmonics, overtones are rarely integer multiples of fundamentals). Without overtones musical instruments would not be recognizable. The importance of intact reproduction is obvious.
GNF is intended to remove the harmonics created by nonlinear amplification, doing it fairly effectively but not selectively, due to intrinsic inaccuracy, multiplied errors and time delay. The sound loses richness, vitality, imaging and resolution in the mid-range.
GNF corrupts the harmonic spectrum in its way unevenly transforming harmonics into high frequency dirt, resulting in disrupted uniformity, incoherency and disturbed correlation between harmonic and IM distortion products.
The same mechanism causes a sharply increased disharmonic (low-level) signal noise, directly modulating the signal, much more harmful than the signal-independent static noise.
The same mechanism causes all the time based dynamic distortions.
The same mechanism implants various impurities bringing about interferences.
The process is expressed mathematically, the consequences are measurable (most of them) and of course hearable.
Or maybe just to stay blissfully unaware of what`s actually going on (ultimately under harsh dynamic conditions).
Complex music signals put really linearity to the test regarding the unpleasant IM distortion. Besides topology, things like carefully chosen parts, high bandwidth and clean power supply are essential.
(Believing that a single THD or IM figure could relevantly indicate sound quality, considering the harmonic structure`s tremendously complicated and delicate nature, is simply preposterous. Essentially, these standards are too lousy to be taken seriously, since benefiting commercial interests and satisfying industrial needs, over the years, all proposals for improvement have been brusquely rejected).
As the open-loop properties are significantly more decisive for the sound, some measurements should be made with the GNF loop(s) disconnected but not even on bases of those figures would I buy any amplifiers.
Instead of relying on obscure analyses, it`s better to use proper live references. J. Hiraga did use. D. Self should have used.
back home after a journey, responding to this topic at the risk of repeating myself.
Please ponder thoroughly what "low distortion design" means practically and sonically...it evokes misleading associations and oxidative stress in me. I rather use the subjective term "good sounding design".
The significance of harmonic spectrum was noticed already in the twenties, when the first "THD" measurements were executed and brought out in every discussion worth a mention, however usually not related to the aural distortion pattern, which admittedly can appear as an unorthodox reference. Although subjective preferences point in that direction, I am not saying it`s the main issue. Nevertheless, hearing is not linear.
(The nonlinearities of hearing have been known for over hundred years, reinforced by continual, intensive worldwide research, providing information, in example, about the audibility and offensiveness of distortions. The nonlinearities originated in the compression occuring in the outer hair cells of the cochlea and can be seen as a sacrifice in order to achieve a desirable large dynamic range for the main purpose, videlicet detection).
A typical amplifier comprises a number of unlinear stages having high gain and burdening operating conditions, producing a lot of high order harmonics, always followed by even worse intermodulation distortion. (Again, low THD values derived from such a harmonic spectrum should not delight anyone). Understandably, you want to get rid of all that. GNF will do the job, making life less unbearable. From distance, everything looks nice, without going out of your way. Now you have a low THD amp, but I would be extremely cautious calling it a low distortion amp, as it may heavily distort dynamically.
Harmonics, or in musical context overtones, entirely determine the characteristics of every sound, (however unlike harmonics, overtones are rarely integer multiples of fundamentals). Without overtones musical instruments would not be recognizable. The importance of intact reproduction is obvious.
GNF is intended to remove the harmonics created by nonlinear amplification, doing it fairly effectively but not selectively, due to intrinsic inaccuracy, multiplied errors and time delay. The sound loses richness, vitality, imaging and resolution in the mid-range.
GNF corrupts the harmonic spectrum in its way unevenly transforming harmonics into high frequency dirt, resulting in disrupted uniformity, incoherency and disturbed correlation between harmonic and IM distortion products.
The same mechanism causes a sharply increased disharmonic (low-level) signal noise, directly modulating the signal, much more harmful than the signal-independent static noise.
The same mechanism causes all the time based dynamic distortions.
The same mechanism implants various impurities bringing about interferences.
The process is expressed mathematically, the consequences are measurable (most of them) and of course hearable.
Exactly, it`s certainly perplexing how the focus has been put on the senseless THD. Probably because that`s the only distortion you can measure conveniently, with a single tone input, that is to say not IM, frequency and phase distortion, still less DIM or TIM.
Or maybe just to stay blissfully unaware of what`s actually going on (ultimately under harsh dynamic conditions).
Complex music signals put really linearity to the test regarding the unpleasant IM distortion. Besides topology, things like carefully chosen parts, high bandwidth and clean power supply are essential.
(Believing that a single THD or IM figure could relevantly indicate sound quality, considering the harmonic structure`s tremendously complicated and delicate nature, is simply preposterous. Essentially, these standards are too lousy to be taken seriously, since benefiting commercial interests and satisfying industrial needs, over the years, all proposals for improvement have been brusquely rejected).
As the open-loop properties are significantly more decisive for the sound, some measurements should be made with the GNF loop(s) disconnected but not even on bases of those figures would I buy any amplifiers.
Instead of relying on obscure analyses, it`s better to use proper live references. J. Hiraga did use. D. Self should have used.
D.Self does not believe that we need to compare to a reference.Lumba Ogir said:
His belief is that if the correct components are inserted into the correct topology, then all amps produce that same noise and cannot be capable of distorting the sound audibly.
I sure my paraphrasing is completely inaccurate but it holds some resemblance to Self's cause.
Hi Ovidiu,
Earlier in this thread there was some discussion of diamond buffer vs. conventional EF drivers for the MOSFET OPS. You mentioned you saw higher crossover distortion with the conventional drivers. I was thinking about this earlier, and it dawned on me that for the Toshiba MOSFETS with conventional drivers, the bias spreader voltage will be about 4.4V (2 * 1.6 + 2 * 0.6), assuming 1.6V for each MOSFET and 0.6V for each BJT driver. For the diamond buffer, this voltage will be about 2.0V (2 * 1.6 - 2 * 0.6).
Since the tempco of the bias spreader is proportional to its voltage, this says the bias spreader tempco for the conventional driver case will be about 2.2x the tempco for the diamond buffer case. Could it be that the MOSFET bias for the conventional buffer case was overcompensated for temperature?
Earlier in this thread there was some discussion of diamond buffer vs. conventional EF drivers for the MOSFET OPS. You mentioned you saw higher crossover distortion with the conventional drivers. I was thinking about this earlier, and it dawned on me that for the Toshiba MOSFETS with conventional drivers, the bias spreader voltage will be about 4.4V (2 * 1.6 + 2 * 0.6), assuming 1.6V for each MOSFET and 0.6V for each BJT driver. For the diamond buffer, this voltage will be about 2.0V (2 * 1.6 - 2 * 0.6).
Since the tempco of the bias spreader is proportional to its voltage, this says the bias spreader tempco for the conventional driver case will be about 2.2x the tempco for the diamond buffer case. Could it be that the MOSFET bias for the conventional buffer case was overcompensated for temperature?
andy_c said:
Andy,
You may have here something, let me think about (and do some calculations). I'm not sure if I used the same bias spreader for the EF experiments. Anyway, I concluded about these Toshiba devices as having an unusually low (5-6mV/C) tempco.
BTW, I am planning a new release for the YAP power stage sometimes in January (better input stage and a few other changes), I may include some options regarding the tempco compensation. Unfortunately, the very high ULG (8MHz) doesn't allow any breadboarding experiments but once I'll get the new boards, I will cannibalize the existing boards and get some experimental results.
syn08 said:
That sounds great. I'm anxious to find out more.
I've been playing around in sim with a high-power output stage inspired by that of YAP. The protection circuit is similar, except it's done by shunting the plus and minus sides of the spreader to the output. The problem I have is that the dissipation in the feedback resistor when a fault condition occurs is such that finding a resistor that can handle it is not in the cards. I'm grateful the YAP thread has turned this up. I'm thinking of having an opto that senses the fault condition and trips the output relay. It seems that when the output stage turns off, the only path for the current through the feedback resistor is through the load, so I guess a relay would fix that. Switching off the output stage electronically before tripping the relay seems like it would prevent abuse of the relay in the fault condition by ensuring the current it interrupts is small. Does this make sense, or am I chasing ghosts?
andy_c said:
Andy,
Be very careful with the protection design. I have tried to shut down the spreader only, but without shutting down the buffer as well, the output was latching to one of the rails! Another thing that a simulation won't necessary tell you...
You are right about the FB resistor, see no. 3 here: http://www.diyaudio.com/forums/showthread.php?postid=1603294#post1603294 It's one of the reason for an update. Here's my solution: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=MP930-100F-ND The opto is already included anyway, but I would prefer not to add more complexity (relays, etc...) to the board (assuming switching off the load would help).
Regarding the input stage, I'm really curious if adding another (diamond?) buffer at the input would help in further improving the THD20. Theoretically (and simulation wise) it should, I'm not so sure in the real world. Another concern is related to the huge DC gain this new (diamond?) buffered power stage would have - and I really don't want to go the CMCL way. We'll see... for the moment I'm enjoying the PGP, my VPI turntable and my new phono stage
I came up with the circuit in the attachment below for the input stage. The funky arrangement with Q20 and Q24 was to isolate the input devices from the "violence" that was occurring with Q3 and Q4 under high slewing conditions. When I hooked up the collectors of Q26 and Q27 to the emitters of Q3 and Q4, the sim bombed under high slew rate conditions.
I also ended up with a current gain of 6x in the CFB stage. The input stage is biased at 5 mA, while the VAS is biased at 30 mA. This was due to a requirement of sourcing/sinking lots of current to the drivers under high slew rate conditions (10+10 output devices at 200 V/us), giving +/- 60mA peak base current to the driver BJTs.
Under sine wave conditions, the input current of the circuit is very low. But under high slew conditions with a square wave, the peak input current is still high at +/- 15 mA or so.
I also ended up with a current gain of 6x in the CFB stage. The input stage is biased at 5 mA, while the VAS is biased at 30 mA. This was due to a requirement of sourcing/sinking lots of current to the drivers under high slew rate conditions (10+10 output devices at 200 V/us), giving +/- 60mA peak base current to the driver BJTs.
Under sine wave conditions, the input current of the circuit is very low. But under high slew conditions with a square wave, the peak input current is still high at +/- 15 mA or so.
Attachments
andy_c said:
Q20 and Q24 seems to be a good idea. I've seen this kind of configuration in some bipolar linear IC designs. It also helps Q3 and Q4 to dissipate less power.
For the rest, I'm not sure I follow. Are you using 10 pairs of output devices? In the current incarnation, YAP uses 3 and 10mA in the driver seems to be an overkill (bot simulated and measured, under pulse conditions). Certainly, 30mA looks like a lot of current here...
You also seem to push 6-7mA through Q26 and Q27. Isn't this to much? Something like 1mA will allow using BC550/BC560 all along except for Q3 and Q4.
andy_c said:
Hi Andy,
Adding Q26 and Q27 is a good thing, as it also removes the nonlinear capacitive load from the previous stage, i.e. less distortion. BUT the rest (I'm sorry to say so) is a waste of silicon. If you give the OPS some gain (e.g. 6dB, see below by means of R6,7,9,10) you can make the circuit much simpler. No need for cascoded current sources, just a few resistors!
Regards,
Edmond.
Attachments
Well, I'm looking at +/- 90V rails, so that ends up being lots of current through the feedback loop at max output power. It seems like increasing R6, R7, R9 and R10 to keep that current down would then constrain the input stage bias current to be pretty low.
Edit: Scratch that - maybe a small resistor could be put in between emitters to up the bias current?
I see what you're saying, though. That's a cool way of bootstrapping using only resistors.
Edit: Scratch that
- maybe a small resistor could be put in between emitters to up the bias current?I see what you're saying, though. That's a cool way of bootstrapping using only resistors.
andy_c said:Well, I'm looking at +/- 90V rails, so that ends up being lots of current through the feedback loop at max output power. It seems like increasing R6, R7, R9 and R10 to keep that current down would then constrain the input stage bias current to be pretty low.
Edit: Scratch that
I see what you're saying, though. That's a cool way of bootstrapping using only resistors.
Hi Andy,
Sure, at +/- 90V rails at lot of power is dissipated in the resistors, but my example was based on a +/- 50V rails. So, please, ignore the actual resistor values, as my schematic was only intended as an example of how to simplify that thing.
As for 'maybe a small resistor could be put in between emitters to up the bias current', I'm not sure where exactly. Please post a schematic.
Regards,
Edmond.
andy_c said:
Hi Andy,
I used a scheme something like this several years back in the MOSFET power amplifiers that I employed in my Athena powered speakers with active crossovers (some description on my website). I'm not sure I'm following the problem you saw with power dissipation in the FB resistor.
In my circuit, I have what I called "flying catch diodes" going from both sides of the bias spreader to the amplifier output node. The anode of one such diode goes to the negative end of the spreader, the cathode of the other goes to the positive end of the spreader. The flying catch diodes are thus normally reverse-biased by about half the spreader voltage. They move with the signal, thus the term "flying". There are also permutations that I refer to as flying Baker clamps.
In a fault situation, the flying catch diodes prevent either end of the spreader from getting more than 1 Vbe from the output node. This implicitly limits the relative forward voltage driving the output transistors "on", providing a natural current-limiting action. With IR VMOSFET output devices, this ends up limiting the gate on voltage to something in the neighborhood of twice the threshold voltage (e.g., on the order of 8 volts), depending on details that can be manipulated. This action conveniently limits the peak fault current.
I then have a short circuit protection circuit (which can be a Triac) that simply shorts out the spreader. This, combined with the action of the flying catch diodes, shuts everything down. The scheme assumes that the VAS stage is current-limited, so that it cannot try to drive the load through the catch diodes by more than 20 mA or so. Once the short circuit protection latching action takes place, the power must be cycled to reset the whole thing.
This scheme can also be applied to MOSFETs with lower threshold voltages with some modification. Ditto in regard to controlling the current limiting point with output stages using emitter resistors (including bipolars, although I've never applied it to bipolars).
I've never seen a problem where this caused a high voltage to cause a lot of dissipation in the FB resistor, but maybe I just got lucky.
Cheers,
Bob
Cheers,
Bob
Hi Bob,
What I had in mind is something like the circuit below. pos_trig would be connected to the collector of an NPN that senses the N-channel output current. neg_trig would perform a similar function for the P-channel side using a PNP. amp_output is just that. Q5 and Q6 serve as an ORing function to turn both latches ON even if only one half of the output stage is sensed as having high current. C1 is the bypass cap of the spreader. The resistors labeled {Rs} are for limiting the peak current in Q1-Q4 due to the rapid discharge of C1 when the latches are triggered.
If I understand correctly what Ovidiu was saying, the high current in the feedback resistor in the fault condition stems from the output stage of YAP being a unity gain CFB amp. Schematic is here. When the output stage is switched OFF, the output voltage is constrained to close to 0 Volts, while the input voltage is pretty much unconstrained due to the feedback trying to correct for the voltage error. The input stage is capable of putting out high current into R52, thus the possibility of high currents in the fault condition. Please correct me if I'm wrong on this.
What I had in mind is something like the circuit below. pos_trig would be connected to the collector of an NPN that senses the N-channel output current. neg_trig would perform a similar function for the P-channel side using a PNP. amp_output is just that. Q5 and Q6 serve as an ORing function to turn both latches ON even if only one half of the output stage is sensed as having high current. C1 is the bypass cap of the spreader. The resistors labeled {Rs} are for limiting the peak current in Q1-Q4 due to the rapid discharge of C1 when the latches are triggered.
If I understand correctly what Ovidiu was saying, the high current in the feedback resistor in the fault condition stems from the output stage of YAP being a unity gain CFB amp. Schematic is here. When the output stage is switched OFF, the output voltage is constrained to close to 0 Volts, while the input voltage is pretty much unconstrained due to the feedback trying to correct for the voltage error. The input stage is capable of putting out high current into R52, thus the possibility of high currents in the fault condition. Please correct me if I'm wrong on this.
Attachments
Bob Cordell said:
Hi Bob,
"but maybe I just got lucky" ? I don't think so. You know damn well what you are doing, don't you? Current limiting and short circuit protection is not as simple as it looks like. Many caveats, as the (local) loop gain during the transition from soft to hard current limiting is in most cases extremely high, ergo oscillations. Your are right, it's also important to pay attention to collector\drain currents of all other stages and limit these currents with appropriate circuitry, or preferable, make it self limiting by design.
Regards,
Edmond.
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