ostripper said:
Thermaltracks have poor models and also spice has limited capabilities when it comes to thermal modelling. Modelling the diode as a MUR120 somehow works, but the gap to the experimental results is still pretty wide. I still have to find a way to experiment and optimize thermaltrack high power output stages (and perhaps extract a set of decent electro-thermal models for spice).
You can feed the opamp from a separate supply, but an opamp is not even really required if you are not planning for ultra low distortion. See the previous schematic for the simplified VSOP.
I havent looked closely at your VSOP derivative but I would strongly suggest an experimental model before going for a PCB. OTOH I would strongly suggest implementing the overload protection as described. I thought myself I can live without, but experiments showed only limited capability to handle overload. For inputs >2.5V, the only factor that limits the disaster scenarios is the opamp limited output current. Once you are switching to a high current opamp (like THS4031) all kind of nasty things may happen, almost impossible to model in spice. Example: the spice bipolar models don't usually have reverse BE junction behaviour implemented.
Very few people here are building AND posting their results. Looking at my inbox, I would say the VSOP is pretty popular, however most are expecting PCB layouts, BOM's and step by step instructions to build and set up. Some of these (like the PCB layouts) are going to happen in time, others never. There's only so much time and certainly I'm not some sort of public service but just another guy trying to have some fun
I also believe that my approach discourages the dirty scoundrels
Although I've seen several attempts to copy and distribute both the PGP and YAP as kits, they all failed miserably These are not copycat jobs, they require some skills and I'm not going to make their life easier. Any idea which is the most common request I get regarding the PGP and YAP? The silkscreen layer and a full BOM I thought Mr Cordell has solved Thermaltrak puzzle. Its basically 1.67 coefficient rather than 2.1 in typical junction. Roender found imperically as well. The other issue was the sensitivity has to be greater than unity. Here is how Bob solved in his favourite T-config.
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syn08 said:
(and perhaps extract a set of decent electro-thermal models for spice).
The silkscreen layer and a full BOM
Tearing SPICE apart at the very core and making T a third independent variable goes a long way toward solving this issue. Computing the right set of coupling coefficients is still difficult.
I remain surprised at how few requests I get for samples.
Re: VSOP 1.2
The extra trannies sense the overload condition using a classic Baker clamp. The currents are OR'ed and injected in the inverting input. This acts as a negative feedback loop, effectively killing the amp gain under overload conditions.
BTW, works fine with the bipolar version as well.
atiq19 said:
The extra trannies sense the overload condition using a classic Baker clamp. The currents are OR'ed and injected in the inverting input. This acts as a negative feedback loop, effectively killing the amp gain under overload conditions.
BTW, works fine with the bipolar version as well.
Mini VSOP 1.2
Syn08,
I realise the Thermaltrak complexity now- ac/dynamic performance needs to be addressed. I have seen similar scheme presented by ES for baker clamp, but wasn't sure how it works.
For my listening test I need 1/3 power of your current scheme. To downsize the o/p is it starightforward changing PS and resistors or there is more to it than I think?
Cheers.
Atiq
Syn08,
I realise the Thermaltrak complexity now- ac/dynamic performance needs to be addressed. I have seen similar scheme presented by ES for baker clamp, but wasn't sure how it works.
For my listening test I need 1/3 power of your current scheme. To downsize the o/p is it starightforward changing PS and resistors or there is more to it than I think?
Cheers.
Atiq
Attachments
Re: Mini VSOP 1.2
They all work about the same way. A simple diode Baker clamp will work when you have to control the local VAS gain only. ES complicates things beyond any reasoning, to get another 0.1ppm down (bootstrapping, etc...).
Scaling down is simple, as you described. There's not much dependency of bias on power supplies, so e.g. +/-53V will do for 100W/8ohm or 200W/4ohm. Three pairs of MOSFETs will as well do just fine.
atiq19 said:
They all work about the same way. A simple diode Baker clamp will work when you have to control the local VAS gain only. ES complicates things beyond any reasoning, to get another 0.1ppm down (bootstrapping, etc...).
Scaling down is simple, as you described. There's not much dependency of bias on power supplies, so e.g. +/-53V will do for 100W/8ohm or 200W/4ohm. Three pairs of MOSFETs will as well do just fine.
Hi Ovidiu,
I really like that active clamp. I'm working on a design in simulation that has a "sticking" problem despite using a clamp like the one in Bob's AES amplifier article. Your clamp struck my eye because of its simplicity, so I thought I'd play around with it in the simulator.
One thing that concerned me a bit was the possibility of avalanche breakdown of Vbe for the clamping transistors. Of course SPICE doesn't handle this at all, but I thought that if I could prevent it in the sim, the actual circuit might have more of a safety margin. The other thing I thought of was looking at the current injected into the feedback loop when the circuit is close to, but somewhat below clipping. It seems that you'd want to minimize this current. I started out with the oversimplified assumption that the common-mode input voltage of the input stage was zero. So I just put a zero volt source from the clamp's output to ground and looked at the current in that source.
Anyway, I came up with the modification below on the left. This circuit has the same component count, while minimizing reverse Vbe and having a much smaller current injected into the feedback loop (current in V3 vs. V7). The diodes clamp the voltages at +/-85V and I apply an 80V peak signal.
What do you think? Also, did you see a distortion increase near clipping from incorporating your clipping circuit?
I really like that active clamp. I'm working on a design in simulation that has a "sticking" problem despite using a clamp like the one in Bob's AES amplifier article. Your clamp struck my eye because of its simplicity, so I thought I'd play around with it in the simulator.
One thing that concerned me a bit was the possibility of avalanche breakdown of Vbe for the clamping transistors. Of course SPICE doesn't handle this at all, but I thought that if I could prevent it in the sim, the actual circuit might have more of a safety margin. The other thing I thought of was looking at the current injected into the feedback loop when the circuit is close to, but somewhat below clipping. It seems that you'd want to minimize this current. I started out with the oversimplified assumption that the common-mode input voltage of the input stage was zero. So I just put a zero volt source from the clamp's output to ground and looked at the current in that source.
Anyway, I came up with the modification below on the left. This circuit has the same component count, while minimizing reverse Vbe and having a much smaller current injected into the feedback loop (current in V3 vs. V7). The diodes clamp the voltages at +/-85V and I apply an 80V peak signal.
What do you think? Also, did you see a distortion increase near clipping from incorporating your clipping circuit?
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Andy,
At the first glance, I don't really understand your schematic. I'll try harder and play with it tomorrow
No, there's no risk of BE junction reverse breakdown, the 4 diodes arrangement is taking care of that. The diode could be placed in the emitter with the current limiting resistor in series, with similar results. You could also place a resistor in parallel with the BE junction, but I've found this is not really required.
Experimentally, I've noticed no distortion impact up to 1V to the clipping limit.
Have you played with the thermaltraks? I would really like to build a bipolar amp with, but I'm still shy of these devices.
Edit: Oh, I got it. Yep, placing the diode in the emitter seems like a better idea. It's nice to have the current limited, just in case...
At the first glance, I don't really understand your schematic. I'll try harder and play with it tomorrow
No, there's no risk of BE junction reverse breakdown, the 4 diodes arrangement is taking care of that. The diode could be placed in the emitter with the current limiting resistor in series, with similar results. You could also place a resistor in parallel with the BE junction, but I've found this is not really required.
Experimentally, I've noticed no distortion impact up to 1V to the clipping limit.
Have you played with the thermaltraks? I would really like to build a bipolar amp with, but I'm still shy of these devices.
Edit: Oh, I got it. Yep, placing the diode in the emitter seems like a better idea. It's nice to have the current limited, just in case...
andy_c said:
syn08 said:At the first glance, I don't really understand your schematic. I'll try harder and play with it tomorrow
Oh, it's just an oversimplified way to look at the clamp by itself without putting it into an entire amplifier simulation. I've approximated the VAS output in a primitive way as a voltage source of 80V peak, 20 kHz. Of course, each clamp will only affect one half-cycle on the diode side of the 100 Ohm resistor in this funky approximation. I was just trying to look at Vbe on the opposite half-cycle from where it clips. It seems that there's some kind of capacitive voltage division going on when there's no resistor from B to E. After the fact, I thought I'd look at how it injects current into the feedback loop, so I put V3 and V7 in there, which are just zero Volt sources to sample the current. V3 and V7 should really be 1/Gain times the VAS output to simulate the common-mode input voltage of the op-amp, but having it be zero shows some interesting effects.
No, the ThermalTrak thread scared me off
. I'm looking at a FET design at the moment.
andy_c said:
You are correct Andy, and thanks. The capacitive divisor may or may not be an issue, depending on the transistors used. For Ibmax reasons, I used 2N5551/2N5401 having rather large Cbe, so the effect was minimal. But changing to 2SC2240/2SA970 shows Vbe close to the breakdown limit. Certainly worth a couple of resistors to stay on the safe side.
I've amended the schematic in post #59 http://www.diyaudio.com/forums/showthread.php?postid=1800058#post1800058
Re: OPS protection
Yes it does, without any problems. I am not sure though if it's worth of implementing. As you see, there's lot of complexity involved, in fact the protection is about as complicated as the amp itself, effectively doubling the component count and PCB area (without the power devices).
Here's the whole enchillada I am currently playing with. You would of course notice how complex this thing is. Though, the number of transistors in the signal path is very small (given the performances).
Edit: The output 1uH inductor has a 2.2ohm resistor in parallel.
atiq19 said:
Yes it does, without any problems. I am not sure though if it's worth of implementing. As you see, there's lot of complexity involved, in fact the protection is about as complicated as the amp itself, effectively doubling the component count and PCB area (without the power devices).
Here's the whole enchillada I am currently playing with. You would of course notice how complex this thing is. Though, the number of transistors in the signal path is very small (given the performances).
An externally hosted image should be here but it was not working when we last tested it.
Edit: The output 1uH inductor has a 2.2ohm resistor in parallel.
Ovidiu,
Without protection , especially with BJTs, the amplifier is incomplete. Leaving extra pcb space requirements aside, there are only few transitors and passive component involved in YAP protection . I can understand mass production where every component counts, but for DIY we may consider even tiny details. This is my view. Everyone is free to take a view. Now the question is how do we implement the same protection concept in VSOP? Honestly I do not understand 100% of the scheme. Do you care to shed some light on this wrt to VSOP?
Cheers
Atiq
Without protection , especially with BJTs, the amplifier is incomplete. Leaving extra pcb space requirements aside, there are only few transitors and passive component involved in YAP protection . I can understand mass production where every component counts, but for DIY we may consider even tiny details. This is my view. Everyone is free to take a view. Now the question is how do we implement the same protection concept in VSOP? Honestly I do not understand 100% of the scheme. Do you care to shed some light on this wrt to VSOP?
Cheers
Atiq
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