Shouldn't the C6 bootstrap be referenced to the negative rail instead?
OLUG doesn't usually have to be smaller for higher OLG amps, but the OLG -3db point does. This is true for most designs, if OLG is increased being careful not to unwittingly lose BW.
PS: I like that design, I never liked cascaded differentials but the implementation here is growing on me.
- keantoken
OLUG doesn't usually have to be smaller for higher OLG amps, but the OLG -3db point does. This is true for most designs, if OLG is increased being careful not to unwittingly lose BW.
PS: I like that design, I never liked cascaded differentials but the implementation here is growing on me.
- keantoken
Changed R20/21/25 to 820R... removed D4-6. I suspect these were used to set the operating points for the voltage stage trannies.
Doing as you suggested decreased the distortion by half from what it was , BUT you had to choose your resistor wisely ... luckily 820 was about right. With the diodes in, 220/270/330 .. even 470R worked well without any simulator "hangup" (no operating point , Tseed messages).
Keen , I still have your address , on the first .. do you want 2 PB60's and the 2 Blameless's (AX)?? I will throw most of the parts in the box along with it. I figured you would want the "New" and not the "old" .. these are better anyways.
OS
Thanks for catching that bootstrap error (C6) , haven't made a LED CCS in a long while. 
I might ditch those diodes ... with them I had to use lead compensation to pull the phase up at unity gain. Without them I had a big bump at my UG point. remove the lead comp... perfect phase at 950khz without 4 more components. I like that!! (pix1 - no diodes-820R / pix 2 - remove C5)
last pix is the reference (M-90) as you can see I gave the poor amp a little better environment to work in.
OS
I might ditch those diodes ... with them I had to use lead compensation to pull the phase up at unity gain. Without them I had a big bump at my UG point. remove the lead comp... perfect phase at 950khz without 4 more components. I like that!! (pix1 - no diodes-820R / pix 2 - remove C5)
last pix is the reference (M-90) as you can see I gave the poor amp a little better environment to work in.
OS
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I calculated 340 ohms to match the VAS quiescent, 2mA through 340=.68V, to keep other factors as close as possible without skewing the measurements.
I was planning on using those older boards to experiment, and they so happen to have silver-mica caps on them, no? With the original boards I can use the existing components without worrying about a sub-optimal testbed, having to use NP0 ceramics (I don't have any SM's, my headphone amp is using what I hope are C0G ceramics). But the PB60's are also really nice for prototyping, I can airscuplture any frontend I want on to them. I am happy with the AX's, but the SM caps are important to me, will they be included?
I have done lots of simulations with this type of compensation. Here is my approach:
1: Make phase lead 5pF default (or whatever you prefer)
2: Make C103 10uF.
3: Adjust R115 for best phase margin/stability.
4: Decrease C103 until phase margin begins to worsen, back off until satisifed.
5: Change phase lead cap if the results do not satisfy.
6: If desired, repeat 3 and 4 to tweak OL BW, until OLUG is under the "phase hump". However, this may have negative effects on stability into capacitive loads.
This way, I don't believe it is necessary to change the phase lead comp, and I like to keep it low (say 5pF) to avoid excessive phase shift at 100KHz (but that's just me).
- keantoken
I was planning on using those older boards to experiment, and they so happen to have silver-mica caps on them, no? With the original boards I can use the existing components without worrying about a sub-optimal testbed, having to use NP0 ceramics (I don't have any SM's, my headphone amp is using what I hope are C0G ceramics). But the PB60's are also really nice for prototyping, I can airscuplture any frontend I want on to them. I am happy with the AX's, but the SM caps are important to me, will they be included?
I have done lots of simulations with this type of compensation. Here is my approach:
1: Make phase lead 5pF default (or whatever you prefer)
2: Make C103 10uF.
3: Adjust R115 for best phase margin/stability.
4: Decrease C103 until phase margin begins to worsen, back off until satisifed.
5: Change phase lead cap if the results do not satisfy.
6: If desired, repeat 3 and 4 to tweak OL BW, until OLUG is under the "phase hump". However, this may have negative effects on stability into capacitive loads.
This way, I don't believe it is necessary to change the phase lead comp, and I like to keep it low (say 5pF) to avoid excessive phase shift at 100KHz (but that's just me).
- keantoken
I will give you the other 2 68PF SM's , 4-6 NJW0281/0302's ,2 pair MJE15032/33, all sorts of caps .. most of my "junk plate" from the supersyms(I stripped them). You might have to spring for some .22-.27R emitters and the PS caps/ trafo.
My next round of Voltage boards will be 4 each of AX's/GX's/ and 2 PX's !!
)I give you these AX's not because they are defective .. But I am perfectionist and will update the AX as soon as these are tested. (I only accept the latest revisions. The PB60's I will update before I make my next 6 (2 are yours - I get 6 per 8" X 10" FR-4).
OS
Stay tuned for tomorrow's test , may be subjective but I am not too old (real good ears - and new tweeters)
OS
I used KT's tricks to get my -180DB noise floor and I'm glad I did.
Below plots are so far beyond the blameless or it's UDL clone that Wahib MUST simulate this one. .000032% and -150 H5/7/9 (or better at 1K) ...what the heck!! The only bad thing is that H3 is dominant as compared to H2.
Gonna build this one.. HAVE to!!
OS
Below plots are so far beyond the blameless or it's UDL clone that Wahib MUST simulate this one. .000032% and -150 H5/7/9 (or better at 1K) ...what the heck!!
The only bad thing is that H3 is dominant as compared to H2.Gonna build this one.. HAVE to!!
OS
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OS, many popular amps have the dominant H3 characteristic. In LTP amps anyways, the dominant H2 criteria can be difficult because H2 will dodge around depending sheerly on the Hfe variance of the outputs, matching of dual VAS (singleton VAS eliminates this mechanism, albeit at some expense), etc. For consistently dominant H2 there needs to be a non-symmetrical stage somewhere.
I am very impressed with this amp's performance. I will simulate the cascaded differential.
Will you try my method for adjusting the compensation? In my headphone amp I used a trimmer for R115, and will set with a resistor when finished.
- keantoken
I am very impressed with this amp's performance. I will simulate the cascaded differential.
Will you try my method for adjusting the compensation? In my headphone amp I used a trimmer for R115, and will set with a resistor when finished.
- keantoken
Could I just .step{rcomp}R115 (r17 on the PX) , sit back and watch the action ??
I did this to the Diff resistors on both pairs and the CCS. I just hit .000008%/1k THD
.OS
WHAT is that you said...
steps are nice ..see cause and effect. Did what you said... used a grossly big 1uF for the cap and stepped from 22 to 500R .The "effect" diminished after 330R. "the effect" is a increase of the UGP along with increasing phase margin as the resistor value is increased with diminishing returns after 300R , at least with a 1uF cap. (Below)OS
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Something else is compensating the amp so that the RC comp network plays minimal role.
If it were not, I believe you would see the best specs at 5-10R.
Try removing C9 in your previous schematic (attached for convenience). This may seem counter-intuitive, but I believe you will get higher OLUG point this way, along with increased OL BW. Plus, you will be using compensation updated to your actual design.
I should probably use the step command, I just forget to. I just memorize the important parts of the previous plots.
- keantoken
If it were not, I believe you would see the best specs at 5-10R.
Try removing C9 in your previous schematic (attached for convenience). This may seem counter-intuitive, but I believe you will get higher OLUG point this way, along with increased OL BW. Plus, you will be using compensation updated to your actual design.
I should probably use the step command, I just forget to. I just memorize the important parts of the previous plots.
- keantoken
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It will do a bode plot without C9 , but will oscillate or give "timestep too small" errors without it in a standard signal test.
Pioneer uses 2 39pF caps in series in a obscene lead comp arrangement. i might also try to lower the amount of GNFB by using the 22k/470 ratio to set the overall gain.
OS
Pioneer uses 2 39pF caps in series in a obscene lead comp arrangement. i might also try to lower the amount of GNFB by using the 22k/470 ratio to set the overall gain.
OS
Try hanging 100pF off Q8's collector to ground, see if that makes the simulator work.
"timestep too small" error happens, I believe, when the simulation contains risetimes so fast that the timestep is too large to accommodate the specified simulation accuracy/tolerance. Not sure though. I will simulate this amp and check things out myself.
- keantoken
"timestep too small" error happens, I believe, when the simulation contains risetimes so fast that the timestep is too large to accommodate the specified simulation accuracy/tolerance. Not sure though. I will simulate this amp and check things out myself.
- keantoken
I tried the shunt compensation , both symmetrical and one sided - to ground (like roenders folded cascode amp) no go.. I DID get your 1 or 10 uf + 10-100R R/C combo to take over the com.p to make the amp stable. what that did was increase the distortion to .01% versus .000008% for the values in the PX schema , even after adjusting for optimal Vbias and voltage amp current.
It still "befuddles" me what is really happening here.
pioneer must of had a "guru" on hand for this one.
OS
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