That is 137mA DC current with extremely nice output impedance!
On a typical 15V rail, if the load is small, e.g. up to a few opamps, a 150R 5W ceramic at the output will load the SR with 100mA constant current on top of the opamp load. Assuming 5V voltage drop across the pass transistors, the dissipation will be 0.5W on the pass transistors / heatsinks for the 100mA current, and a bit more including the load from the opamps. This one is quite manageable.
The 150R 5W resistor will dissipate 1.5W, and it will make the surrounding PCB tracks quite hot, and transfer the heat to the output electrolytic cap (shortening its life) and to the pass transistor as well.
Given that the output impedance of the SR is so low, perhaps a 300R 2W at the output of the SR will do a nice job. It creates a 50mA DC load and itself dissipates 0.75W power. It runs cooler. The output impedance may be 30% worse or something like that comparing to using a 150R. It may still be nothing given the impedance is so low. I don't have measurements or simulations to back my numbers though.
The SR schematic is published in the public domain. Is there a SR Spice model available?
On a typical 15V rail, if the load is small, e.g. up to a few opamps, a 150R 5W ceramic at the output will load the SR with 100mA constant current on top of the opamp load. Assuming 5V voltage drop across the pass transistors, the dissipation will be 0.5W on the pass transistors / heatsinks for the 100mA current, and a bit more including the load from the opamps. This one is quite manageable.
The 150R 5W resistor will dissipate 1.5W, and it will make the surrounding PCB tracks quite hot, and transfer the heat to the output electrolytic cap (shortening its life) and to the pass transistor as well.
Given that the output impedance of the SR is so low, perhaps a 300R 2W at the output of the SR will do a nice job. It creates a 50mA DC load and itself dissipates 0.75W power. It runs cooler. The output impedance may be 30% worse or something like that comparing to using a 150R. It may still be nothing given the impedance is so low. I don't have measurements or simulations to back my numbers though.
The SR schematic is published in the public domain. Is there a SR Spice model available?
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So between AD825 and LME49710, which one is better?
You reminded me of one thing which has not been discussed.
In Jung's literature, he illustrated the importance of matching the input impedances of +In and -In of an opemap in audio circuit. Not only unmatched input impedances create more distortions, but also create DC offset. DC offset caused by unmatched input impedance is worse with BJT input opamp (like LME49710) and better with JFET input opamp (like AD825).
The input impedances of +In and -In of the opemap used in the SR are not really matched. They may or may not affect performance. I am not sure.
Has anybody thought of adjusting the values of R4, R5, R6 and R7 to make the input impedance appearing at +In and -In a bit closer?
Would an opamp, like opa627, which has very low output DC offset, be better?
Is that 120uF the output cap, or a separate cap on the load in addition to the 120uF output cap?
I built the Jung SR AWL version on a dot matrix board using point to point wiring 6 years ago and it sounded quite good. But I was less experienced at that time than I am now (I am still a beginner!) and I found some mild resonances at RF because of my poor implementation. I think I am now on course to build the new Jan Didden's V2.2 to try it out again.
Mr. Walter Jung has just published the new "A Universal Shunt Regulator for Audio Applications May 2015" on his site: http://www.waltjung.org/PDFs/UnivReg_122714.pdf
Check it out. It is very interesting. A large part of the circuit is the same as the SR circuit. The R4 as in Didden's SR has increased from 499 to 1k on the opamp +in, and a 499 is added to the opamp -in. A 33pF cap can be installed between the opamp -in and out to ensure stability when necessary.
Any common on this mod?
Check it out. It is very interesting. A large part of the circuit is the same as the SR circuit. The R4 as in Didden's SR has increased from 499 to 1k on the opamp +in, and a 499 is added to the opamp -in. A 33pF cap can be installed between the opamp -in and out to ensure stability when necessary.
Any common on this mod?
Isn't that collector connected to the input voltage? So wouldn't whatever capacity you put on the collector just be in // to a huge electrolytic?
Jan
I have updated the layout with the sense connections for ref and output voltage setting and posted it on my personal website.
I also send all layout files to Jason as he was about to order more PCBs, so those will then be the new V2.3 boards.
Thanks guys for the continued discussions and challenges - this keeps on getting better and better!
Jan
I also send all layout files to Jason as he was about to order more PCBs, so those will then be the new V2.3 boards.
Thanks guys for the continued discussions and challenges - this keeps on getting better and better!
Jan
I built myself SR PCB-s with Gerber files you published.Why did you change pass transistors position in revised PCB-s?
I probably would have packed a little bit less gain in the loop to be sure I wouldn't need the comp cap. But it's a design decision, not sure which would be better in practice.
Jan
In PCB-s I made pass transistors heatsink tabs are faced toward the edges of the boards, but in new versions they are toward the centre.
Ohhh you are talking about the 35 year old Old Colony boards? There it was assumed you'd use a specific flat heatsink. he diyaudio boards are designed for vertical heatsinks.
Here is a question.
We understand that there should be no low ESR caps at the load. Let us assume that the load has 5 x 22uF medium to high ESR low ESL electrolytic caps from a power plane to a ground plane for the purpose of local low inductance path for the power supply. The 22uF caps would cause no problems. But the power plane and ground plane would have a parallel plate capacitance from 30pF to 100pF, depending on the PCB power and ground plane sizes. Would this parallel plate capacitance cause problems to the SR?
I don't have any ideas about the "ESR" of the power and ground plane capacitance so I don't know the answer.
We understand that there should be no low ESR caps at the load. Let us assume that the load has 5 x 22uF medium to high ESR low ESL electrolytic caps from a power plane to a ground plane for the purpose of local low inductance path for the power supply. The 22uF caps would cause no problems. But the power plane and ground plane would have a parallel plate capacitance from 30pF to 100pF, depending on the PCB power and ground plane sizes. Would this parallel plate capacitance cause problems to the SR?
I don't have any ideas about the "ESR" of the power and ground plane capacitance so I don't know the answer.