One size gives fits to all.
I thought you were paralelling references for noise reduction which I have seen done somewhere with build out resistors for each to isolate them. You have 6 different footprints for three different part outlines for two different polarities of references? Man I feel sorry for the guy trying to build one of these..... Isn't that pretty confusing for some one trying to figure out how to build one of these, or God forbid two, one of each polarity.
I thought you were paralelling references for noise reduction which I have seen done somewhere with build out resistors for each to isolate them. You have 6 different footprints for three different part outlines for two different polarities of references? Man I feel sorry for the guy trying to build one of these..... Isn't that pretty confusing for some one trying to figure out how to build one of these, or God forbid two, one of each polarity.
Re: One size gives fits to all.
QEX had an article using several of the Thaler VRE305 Precision References in parallel. These are 0.01% acuracy, 0.6ppm drift. Who needs an Eppley Cell ? Unfortunately you have to get them directly from Thaler.
Fred Dieckmann said:I thought you were paralelling references for noise reduction which I have seen done somewhere with build out resistors for each to isolate them. You have 6 different footprints for three different part outlines for two different polarities of references? Man I feel sorry for the guy trying to build one of these..... Isn't that pretty confusing for some one trying to figure out how to build one of these, or God forbid two, one of each polarity.
QEX had an article using several of the Thaler VRE305 Precision References in parallel. These are 0.01% acuracy, 0.6ppm drift. Who needs an Eppley Cell ? Unfortunately you have to get them directly from Thaler.
I would like to ask that my name *not be* associated with the numerous "new" regulator circuits discussed in this thread. I fact, I think the thread should be renamed, to something like "new regulator".
I take no responsibility for anything here (or elsewhere) so long as it lacks my signature.
Walt Jung
I take no responsibility for anything here (or elsewhere) so long as it lacks my signature.
Walt Jung
Re: One size gives fits to all.
If someone makes this pcb, myself or somebody else, I think it's pretty convenient to be able to choose from many references. A normal intelligent person gather where the part should be in a matter of seconds and if there is a text the person can even read this.Fred Dieckmann said:I thought you were paralelling references for noise reduction which I have seen done somewhere with build out resistors for each to isolate them. You have 6 different footprints for three different part outlines for two different polarities of references? Man I feel sorry for the guy trying to build one of these..... Isn't that pretty confusing for some one trying to figure out how to build one of these, or God forbid two, one of each polarity.
if you're looking to model the power transistor, the MJD44H11 is electrically similar to the D44H11, (same as to the complementary device also) and www.onsemi.com has SPICE2, Sabre and PSpice models. (Sorry, they are copyright, property of On-Semi and you'll have to download yourself.)
On the " Jung regulator - Didden PCB layout" note that the gnd plane was purposefully omitted over some of the more (capacitively) sensitive circuitry. At the time, it seemed to me the best way to avoid making possible oscillatory tendencies worse. Would I make a different layout now, with the hindsight of 8 years of experience and other opamps availble? Yes, in some details. Not in the general grounding and remote sense arrangement. And I would probably leave out the gnd plane, since almost all circuit nodes are low impedance enough to be insensitive to capacitive and RFI interference.
Jan Didden
Jan Didden
Jan, isn't low impedance nodes insensitive to stray caps? Anyway, Fred thinks that the groundplane pcb form ALW is very good and when was he wrong? 
Ok, I have removed groundplane on my MOSFET-QRO power amp inspired of AN-4 from National and I got a slightly better step response but this was a high speed, high impedance node (emitters of a input stage).
From what I can see on bad pictures I believe that you have some ground plane on your pcb's, not totally covering the whole pcb.
You mention also that sheilding with metal can be a good thing when there is oscillation problems.
According to Walt J it's also wise to trim or determine the forbidden range of decoupling caps at the output, small caps or big but not in between. Thing is only to know the suitable values.
EDIT: Reading your post again I'm not sure what mean. Is grounplane good, bad or good if they are made with finesse?
Ok, I have removed groundplane on my MOSFET-QRO power amp inspired of AN-4 from National and I got a slightly better step response but this was a high speed, high impedance node (emitters of a input stage).From what I can see on bad pictures I believe that you have some ground plane on your pcb's, not totally covering the whole pcb.
You mention also that sheilding with metal can be a good thing when there is oscillation problems.
According to Walt J it's also wise to trim or determine the forbidden range of decoupling caps at the output, small caps or big but not in between. Thing is only to know the suitable values.
EDIT: Reading your post again I'm not sure what mean. Is grounplane good, bad or good if they are made with finesse?
The circuit formerly known as the "SJDGandW"regulator
'From what I can see on bad pictures I believe that you have some ground plane on your pcb's, not totally covering the whole pcb."
What PCBs? I have never laid out a PCB for the Super Op Amp Power Supply Under Development Series regulator. I don't know that a circuit this small with single point grounding requires a groundplane. Don't connect to capacitor cans to ground! I was kidding and trying to make the point that parts are subject to RFI as well as PCB traces. Try the PCB layout both ways and tell us if it measures and/or sounds different.
'From what I can see on bad pictures I believe that you have some ground plane on your pcb's, not totally covering the whole pcb."
What PCBs? I have never laid out a PCB for the Super Op Amp Power Supply Under Development Series regulator. I don't know that a circuit this small with single point grounding requires a groundplane. Don't connect to capacitor cans to ground! I was kidding and trying to make the point that parts are subject to RFI as well as PCB traces. Try the PCB layout both ways and tell us if it measures and/or sounds different.
I DID say that the low-impedance nodes are insensitive. Read my post if necessary. And indeed, there is a (partial) gdn screen on my original layout. But again, please reread my post for my current thoughts on that. I do agree with Fred (after 8 years of more experience with these circuits) that the screen can probably be omitted without adverse effects. I think you are smart enough to realise that the answer on your question is screen good or bad is: depends.
And the quote on gnd cap cans is not mine, sorry.
The issue of output caps has been beaten to death sufficiently on this forum. Bottom line: very good caps with low ESR and high Q can cause oscillations. Stay with the reasonably good electrolytics (ESR above a few 10ths of an Ohm) and there will be stability in your regulators.
Fred: He refers to a PCB layout of mine, not yours. Turn down your pacemaker a few clicks.
jan Didden
And the quote on gnd cap cans is not mine, sorry.
The issue of output caps has been beaten to death sufficiently on this forum. Bottom line: very good caps with low ESR and high Q can cause oscillations. Stay with the reasonably good electrolytics (ESR above a few 10ths of an Ohm) and there will be stability in your regulators.
Fred: He refers to a PCB layout of mine, not yours. Turn down your pacemaker a few clicks.
jan Didden
I did in fact refer to the ALW pcb which Fred has which he highly regards according to his posts, and the Didden pcb in the article... I think he is pulling my leg here.
I think we can come to this conclusion: The JSR doesn't need groundplane in order to work good but on the other hand a groundplane does good and absolutely no harm.
I don't know (haven't got the formula handy) how much stray capapcitance a small trace above a groundplane creates but a 1 cm^2 plate on a pcb will create 2-4 pF. A small trace will create less 0.5 pF? Not much. But still this can be much at 900 MHz or so, even in my power amp it has influence. In this amp I used transistors with 1.8 pF collector capacitance.
I think we can come to this conclusion: The JSR doesn't need groundplane in order to work good but on the other hand a groundplane does good and absolutely no harm.
I don't know (haven't got the formula handy) how much stray capapcitance a small trace above a groundplane creates but a 1 cm^2 plate on a pcb will create 2-4 pF. A small trace will create less 0.5 pF? Not much. But still this can be much at 900 MHz or so, even in my power amp it has influence. In this amp I used transistors with 1.8 pF collector capacitance.
Grounds for termination.
"On the other hand a groundplane does good and absolutely no harm."
I have heard a very noticable difference between a VERY small pad for the summing junction resistor connection, and bending the pin away from the board and mounting the resistors to the summing node on top of the 50 MHz op amp for a buffered differential SPDIF input circuit. Don't forget that RFI is there along with the signal you are trying to work with. What is this obsession with only 900 MHz? There is a lot of stuff in addition to cell phone frequencies to consider, all though the 900 MHz does seem to get into everything as well and was always there as ambient when I did a lot of EMI reduction work.
"On the other hand a groundplane does good and absolutely no harm."
I have heard a very noticable difference between a VERY small pad for the summing junction resistor connection, and bending the pin away from the board and mounting the resistors to the summing node on top of the 50 MHz op amp for a buffered differential SPDIF input circuit. Don't forget that RFI is there along with the signal you are trying to work with. What is this obsession with only 900 MHz? There is a lot of stuff in addition to cell phone frequencies to consider, all though the 900 MHz does seem to get into everything as well and was always there as ambient when I did a lot of EMI reduction work.
Per-Anders,
I'm not sure if you've done any stability or transient response simulation using steps of load current for this circuit using LTSpice, but I suspect not. The reason I mention this is the presence of C13, a 0.1uF X7R capacitor directly at the regulator output. I found an impedance plot of the 0.1uF X7R chip cap here: http://www.niccomp.com/Catalog/nmc2.pdf. This plot shows a series resonance at about 19 MHz with a series resistance at this frequency of about 0.07 Ohms. This corresponds to a series inductance of about 0.7 nH. I have attached an LTSpice plot of the frequency response of the pass elements from the simulation of the 90 Volt version of the regulator I posted earlier (which admittedly is a bit different, being a Darlington configuration with different devices). I added this capacitor my simulation and plotted the frequency response of the pass element with and without the capacitor. The phase plots are above and the magnitude plots below. What's happening here is the open-loop output inductance of the pass elements is forming a resonant circuit with the 0.1uF capacitor, causing the amplitude response to peak at 4 MHz (the lower blue plot), and the phase to take a very sudden dive at this same frequency (the red plot).
Combine this with the AD797, which has an open-loop gain of 40 dB at 1 MHz, and my guess is that you have an oscillator here. I see that you have the network of C9 and R9 to provide some lead compensation at high frequencies, and this may be a partial fix. But this design causes some problems too. I tried this compensation approach with the 90 Volt regulator and gave up on it. I was using the Middlebrook technique to look at the loop gain and phase for AC, and adjusted the feedback capacitor to get good phase and gain margins. However, with essentially two feedback paths, the loop gain does not tell the whole story with regard to the transient response of the output to a step of load current. What happens is that since there is much less feedback from the output at high frequencies, the open-loop characteristics of the pass element at these frequencies (mostly iinductive) has an effect that's much more pronounced than you would expect. You get lots of ringing, even though the overall gain and phase margins of the loop might be quite good.
Many of these issues have already been discussed in this thread.
I'm not sure if you've done any stability or transient response simulation using steps of load current for this circuit using LTSpice, but I suspect not. The reason I mention this is the presence of C13, a 0.1uF X7R capacitor directly at the regulator output. I found an impedance plot of the 0.1uF X7R chip cap here: http://www.niccomp.com/Catalog/nmc2.pdf. This plot shows a series resonance at about 19 MHz with a series resistance at this frequency of about 0.07 Ohms. This corresponds to a series inductance of about 0.7 nH. I have attached an LTSpice plot of the frequency response of the pass elements from the simulation of the 90 Volt version of the regulator I posted earlier (which admittedly is a bit different, being a Darlington configuration with different devices). I added this capacitor my simulation and plotted the frequency response of the pass element with and without the capacitor. The phase plots are above and the magnitude plots below. What's happening here is the open-loop output inductance of the pass elements is forming a resonant circuit with the 0.1uF capacitor, causing the amplitude response to peak at 4 MHz (the lower blue plot), and the phase to take a very sudden dive at this same frequency (the red plot).
Combine this with the AD797, which has an open-loop gain of 40 dB at 1 MHz, and my guess is that you have an oscillator here. I see that you have the network of C9 and R9 to provide some lead compensation at high frequencies, and this may be a partial fix. But this design causes some problems too. I tried this compensation approach with the 90 Volt regulator and gave up on it. I was using the Middlebrook technique to look at the loop gain and phase for AC, and adjusted the feedback capacitor to get good phase and gain margins. However, with essentially two feedback paths, the loop gain does not tell the whole story with regard to the transient response of the output to a step of load current. What happens is that since there is much less feedback from the output at high frequencies, the open-loop characteristics of the pass element at these frequencies (mostly iinductive) has an effect that's much more pronounced than you would expect. You get lots of ringing, even though the overall gain and phase margins of the loop might be quite good.
Many of these issues have already been discussed in this thread.
Attachments
Thanks Andy. Yes I know that choice of output capacitors is a sensitive part. It's not good that they are too good in some situations. The slow down parts are "just in case", first just short R9.
Have you used "my" transistors in your simulations?
At the moment I can't see blue very well because my monitor i broken... after 12 years... a Sony 19" monitor. I have some problems with the red and blue, not allways. I have exersized all connectors I can think of but I helped only for a short while. What can be the problem when blue is 100% on sometimes and red is 100% or 50% on.
Fred: Didn't you promise yourself that you wouldn't tell me anything usefull I appreciate it though.
What will you tell by your last statement, that the JSR ought to have resistors in the air?
Jan, since we are talking about groundplane or not, have the pcb layout gone through any improvements since AE 4/2000 or is it "frozen"?
Have you used "my" transistors in your simulations?
At the moment I can't see blue very well because my monitor i broken... after 12 years... a Sony 19" monitor. I have some problems with the red and blue, not allways. I have exersized all connectors I can think of but I helped only for a short while. What can be the problem when blue is 100% on sometimes and red is 100% or 50% on.
Fred: Didn't you promise yourself that you wouldn't tell me anything usefull
I appreciate it though.What will you tell by your last statement, that the JSR ought to have resistors in the air?
Jan, since we are talking about groundplane or not, have the pcb layout gone through any improvements since AE 4/2000 or is it "frozen"?
Wow, those are nice transistors. My new simulation shows they make quite a difference. But in order to get good results, I'd need ESL and ESR data of the 100 uF load capacitors. According to the ELNA America web site http://www.elna-america.com/PDF/RV2.PDF, the 35 Volt RV2's only go up to 22 uF. Do you have more values available in Sweden? I don't see these in RV3 or RV4 either. I do see a RV35V101MG10-R. These parts have a pretty high ESR: 2.0 Ohms. I'd guess the ESL would be slightly lower than the leaded types, maybe 20 nH instead of 30 nH?
Anyway, here's the plot with leaded caps with 30 nH ESL and 0.25 Ohm ESR. The loss is 12 dB at about 8 MHz, while the open-loop gain of the AD797 is about +12 dB at this same frequency. So the unity loop gain frequency of your circuit would be about 8 MHz without the 100 pF compensation cap. The phase lag is about 57 degrees at this frequency, while the phase margin of the AD797 is about 62 degrees at the same frequency. So it looks like an oscillator without the compensation cap. Without the 0.1 uF capacitor, the 60 degree phase lag at 8 MHz goes away and you have a very wideband circuit.
Anyway, here's the plot with leaded caps with 30 nH ESL and 0.25 Ohm ESR. The loss is 12 dB at about 8 MHz, while the open-loop gain of the AD797 is about +12 dB at this same frequency. So the unity loop gain frequency of your circuit would be about 8 MHz without the 100 pF compensation cap. The phase lag is about 57 degrees at this frequency, while the phase margin of the AD797 is about 62 degrees at the same frequency. So it looks like an oscillator without the compensation cap. Without the 0.1 uF capacitor, the 60 degree phase lag at 8 MHz goes away and you have a very wideband circuit.
Attachments
Re: To grammer's house we go
I have made two simulations. The first was the diamond buffer and I must say that I'm not impressed by the distortion simulations. Much better in real life.
The next design which Fred of some peculiar reason not has commented at all is also simulated. The layout is 98% ready and this amp is going to be a huge commercial success I think, because it's SMD and real hard to solder..... I have already contacted by investers and bank people. I even called some people at Wall Street and they promised me to invest my money in a good way.....
I am in fact a newbeginner in simulations and I must say I don't have missed it very much. I thank though andy_c and sonnya which have encourage me to start simulating.
Fred Dieckmann said:
I have made two simulations. The first was the diamond buffer and I must say that I'm not impressed by the distortion simulations. Much better in real life.
The next design which Fred of some peculiar reason not has commented at all is also simulated. The layout is 98% ready and this amp is going to be a huge commercial success I think, because it's SMD and real hard to solder..... I have already contacted by investers and bank people. I even called some people at Wall Street and they promised me to invest my money in a good way.....
I am in fact a newbeginner in simulations and I must say I don't have missed it very much. I thank though andy_c and sonnya which have encourage me to start simulating.
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