SS 120R085 Depletion Mode Jfet

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Would the Arch Nemesis AMp benefit from having a 1:1 OT instead of step down since this would solve the bandwidth issue. The major limitation it seems is the currect rating of the trafos. It would seem that you need a toroid like in ZV7. Would you suspect the R085 would benefit more from a B1 buffer or a cascaded fet? Would the buffer allow you to drop input cap and would it affect the sonic signature of the following stages. Sorry for the questions. Waiting for all pieces of the puzzle to get here and having trouble sitting still.:)
 
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TeaBag,
I looked at the ZV8 and the De-Lite articles again and noticed that in a similar setup, the SS DM Jfet trounces the LU. That is based soley on measurements and not actual listening. Seems I need to send you another PM. I have yet been able to see the connection to the Nemesis article other than a confirmation of similar results with the R085. There is the implication that a higher voltage->higher bias leads to better results.
 
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TeaBag,
I looked at the ZV8 and the De-Lite articles again and noticed that in a similar setup, the SS DM Jfet trounces the LU. That is based soley on measurements and not actual listening. Seems I need to send you another PM. I have yet been able to see the connection to the Nemesis article other than a confirmation of similar results with the R085. There is the implication that a higher voltage->higher bias leads to better results.

Yes, the Nemisis is a reference point for an amp that works, we should be able to determine a few points. Mainly there is a a certain amount of voltage and current going through it that works, at least with a trafo on output.

Also agree with the higher voltage and bias - The F3 also benefits from a higher voltage than normal FW PS.
Just have to find time to gut various parts of my F3. Pulling the cascode IRF out will be latter step I think, messing with bias and source resistance first, and tweaking or removal of feedback. As Nelson has noted, and I can say, there have been many people interested in modding there F1 and F2, and can imagine people might want to play with their F3's. A more popular amp I think.

The De-Lite and ArchNemesis don't have a clear path to a good slow start power supply, and I consider that a limitation. For me, no turn on thump is very important.

Of course, I am also wondering if Nelson will pull this part out of the bag as an option for an F6.
 
I ordered extra for my F3 if you need anything. Let me know. If the R085 is indeed more linear with less distortion, then developing a higher power F3 along the lines of what Vladmirk did seems interesting. Might be able to add the BA-1 buffer to the tail end without causing too much change in the sound. I hope to start on the standard F3 this week.
 
Could you not put a resistor in series with the trafo? Current seems to be the limitation. I don't know, just learning. More interested in R085 F3 and possible SS PLH.

Well, I think that might increase the load on the transistor improving gain but effectively throwing away the benifit into the resistor.
let me throw in 2cents here: Why has no one brought up for discussion, or tried, the 550 in the cascoded F3 circuit.
AHHEMMM :cool:
Might need a little work to get the EM device bias but...
 
I would lean toward using the 550 in the FE of the PLH. Anything is possible, just leaning towards topology's with similar components in place. The 550 didn't really do as well as the other SS devices in the D-LIte test. Why do you think it would perform better?
 
FE of the PLH is a good idea, maybe with the bigger devices at the output as well?
Also as the VAS of the BA-1 or2?
What de-Lite test of the 550???
Why?
Most of these devices have a rediculous non-linear C curve at low D-S voltages. This messes up the high freq due to the other resistors in the circuit or the available drive current and causes measureable distortion. Remember as the amplifier signal swings D-S voltage up and down, the C load on the circuit driving it is varying widely. Cascoding gets this D-S variation under control to a good degree. Like in the F3. It actually almost gets rid of the capacitance. Remember if there is little or no voltage change between the Gate and Drain or Source, there is no capacitance. The LU device has this problem also as do MOSFETs. Cascoding reduces the voltage difference from Vin vs Vout, to Vin vs cascode voltage. But the cascode voltage does not change so the variation is effectively Vin. 5 times less D-S variation in the cascoded F3 circuit than a non cascoded version.
The power dissapated in the cascoded LU device is only 6-8W at most. The 550 part is a lower power part(very much like the IRF610) but likely capable of maybe 15W max dissapation. So, if you have an F3, you have most of what you need to give the 550 a whirl. You need to add external bias or some bias mechanisim to get the Gate up to +1.0 to +1.2V or so. Note, I said "up to" "+" voltage. Not the self bias method (Source Resistor) as F3 currently usses. You'll need to add an input cap to sheild your source from the 1V bias. You would probably want to make the cascode refrence voltage adjustable and play around looking for the best "distortion spectra" (sound). You probably also want to mess with Source resistor values? And maybe even move the cascode refrence voltage off of ground to the top of the source resistor???
I think thats enough off thread, this is a 085 thread :eek:
 
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My bad. It was the Nemesis article. THis is a thread about new devices in old schematics. All comments welcome. I understand the 550 is an enhancement mode device, so it would need to biased up. The capacitor would be necessary because of the non zero bias, correct. AS for the non linear capacitance, i have asked in other threads why it is not ALWAYS a good idea to have a cascoded fet simply for the benefits it offers. You could drop the cascsode and just use a buffer like in ZV4. All the SS devices clearly have a lot to offer in these different topologies. THe R085 just seems to be the easiest drop in for now. If the F3 yields similar results as the De-Lite, it should show some pretty dramatic improvement.
 
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I think there's some potential in all these devices, and unfotunately, while
I've had time to run up some quick curves and listen to a few examples,
the time isn't there to do extensive listening with every permutation. This
is unfortunate because, as I said: Occasionally there is a surprise.

Here's a curve of an R085 running at 2 amps with a mu follower and 2 ohms
of degeneration (providing degeneration and a bias drop for direct coupled
input).

:cool:
 

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My bad. It was the Nemesis article.
No not bad, but I was wondering how much testing was actually done for that paper. I remember the chart of Gain and THD @ 1k and 20k maybe I should go look again. What struck me about that was he was using serious power on the rest of those transistors that might not be possible on the 550? It does show that it had a relatively low distortion even at the high freq due to the low capacitance. I think it may suffer from less gain though?

AS for the non linear capacitance, i have asked in other threads why it is not ALWAYS a good idea to have a cascoded fet simply for the benefits it offers...
Well take a quick calculation of the F3. what do we have, 1 Volt on the Rs, 2.5V D-S on the LU part, and when the amp output swings low at least 3Volts on the cascode MOSFET. With 1.5A Iq and 6.5V on the lower part of the gain stage that is unuseable for output power, we have 9.75W of unusable power being wasted. In this case it does not seem to extreme but also the LU part is low voltage and low power and would not be nearly the 10W output if not a cascode configuration.
:Pawprint:
 
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I do understand that lower Vd means more capacitance. I guess if this wqs the only parameter, you would operate the fet in tube ranges with extreme voltage and minimal current, having to use trafos to step down V and increase I. I don't know if there is any benefit to this as you have trafo induced distortion, but considering thr Nemesis article, I guess it is possible. This is where my question concerning the cascode comes into play. Clearly the R085 can take more heat than the LU, but who's to say it wouldn't still benefit from the cascode. I would not be surprised if you knew, Nelson, but this is one of the things I hope to discover. In theory the cascaded fet could even be used with the Mu follower, although performance has yet been proven. Buffer vs Cascode seems like a reasonable question if good perfomance can be achieved without the cascode. I also wonder if the mu follower could be adapted to work in an Aleph sort of way. Probably unecessarily reinventing the wheel. It seems creating a CS that is as substantial as possible is a major part of the puzzle as well. Just rambling. I really appreciate all the advice today. Thanks to all. Oh Yeah, R085ms on the way tomorrow! Theory will hopefully become reality soon.
 
Well, I have a question regarding why did the 550 not excel in Nelson's Apples to Apples test from the Arch Article?
Am I correct in assuming that 1 way to look for linearity is by examining the "typical output characteristic" graph in the data sheet? That is, in the case of the 085, look at the fig. 2 (the closest to our typical operating points), -2V, -1V and 0V Gate voltages do not produce a linear increase in Drain current? Now look at the 550 Fig 2. 1.5V, 2V and 2.5V result in a very even, incremental increase in Drain current. Isn't this an example of a linear input to output transfer function? Now I agree, I just breezed right by some details like a 2V swing for the 085 and only a 1 volt swing for the 550 and Id close to our operating point for the 550 but Id in the 20A range for the 085 but, it sure looks better on the 550 data sheet?
If we where concerned with capacitance the 085 is 5 times the capacitance of the 550. Dosen't that give the 550 some benifit not just at 20kHz?
Am I looking at the wrong stuff? Nelson admits not having time to optimize or listen to all those parts in their most blissfull configurations but from what I've been reading I would expect it to surPass the IRFP240? Well I guess it does in some ways. Apples to Apples may not actually be a fair way to compare these 2 devices?
 
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The one and only
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The opportunity exists to explore the R550 more, and as you can see in
the curve above, there's nothing particularly wrong with the part. With
the limited time before Jan's publication date, I went with what looked
most promising. It certainly is a faster part.

The constraint of using a transformer does shape a lot of this, and is not
necessarily the way to go.

:cool:
 
I am not quite sure if this applies to single devices, but here is some info from another thread on the matter of capacitance.

I was leafing through one of my older notebooks today and
came across something you may like.

A number of you have asked about the trade-offs in
paralleling power Mosfets, particularly driving the Gate
capacitances. Practically speaking, we are talking the
Gate-to-Source and Gate-to-Drain capacitances.

As we parallel devices, we linearly increase the transcon-
ductance, Cgs and Cgd of the parts. Neglecting Cds, the
amount of current it takes to drive the Cgs is proportional
to Cgs and inversely proportional to the transconductance.

There is a considerable cancellation which helps out when
paralleling devices.

The Cds does not go away and remains proportional.

When you look at the spec sheets on these devices, you will
see typical figures quoted, but at Vgs of 0 volts, which is
not typical of the conditions we will see in a linear amplifier.

For the IRFP240 and the IRFP9240 we see a Ciss (total input
capacitance) of 1300 pF and 1400 pf respectively. For the
reverse transfer capacitance Crss the figures are 93 pF and
140 pf respectively.

In linear operation, though, the numbers are different.

Let's take an example of a complementary follower output
stage using 4 parallel pairs of IRFP240 and IRFP9240 with
.47 ohm Source resistors and biased at 100 mA each (400 ma
total).

By carefully measuring the Gate current of each device at
8 volts rms into 8 ohms (1 amp rms) at 1 KHz, 10 KHz, and
100 KHz we can measure the total input capacitance. By
performing the same experiment without a load, we can separate
out the Cgd.

Under these conditions the total input capacitance of the
IRFP240 is about 75 pF and the IRFP9240 is about 60 pF.

Without a load, these figures are 45 pF and 35 pF respectively.

So if you're driving an 8 ohm load with 4 pairs of these
devices, you can estimate your apparent output stage
capacitance at (75+60)*4 pF = 540 pF. Keep in mind that you
won't get 135 pF if you try to drive the 8 ohms with just a
single pair, as the Cgs will will have to be charged to a higher
voltage to make up for the loss of transconductance.

buzzforb,
the concept is quite simple - the more transconductance you have, the less Vgs voltage you need to open the Drain-Source chanels of the MOSFETs and with less voltage you'll need less current to charge the MOSFET's capacitances, so the net effect is that the capacitance seems lower.
 
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