john curl said:
I know it can be unstable. In at times unpridictable ways. Also at times it will blow the P channel output (using Hitachis). Perhaps it blows the outputs by pulling the gate too low and burning the input zener so gate resistors may solve that. The whole thing may be better implemented with bipolars (putting the - input devices on the heatsinks for thermal compensation. AND carefull selection of the outputs (rugged enough to withstand the SOA problems this type output scheme (common emitter(source)) seems to engender.........mike
First, think about removing ALL the current sources and just using 1 resistor between the source pairs on the input. Second, this is actually a very stable design, because it has almost no gain, but 1/2A Hitachi devices can be problematic, because they are not well matched in this situation. The P channel looks like a triode, but the N channel looks like a pentode. Too much 2'nd harmonic. How do we fix this?
Mr. Curl,
If you were to update the JC-3, would this be the topology you would use? It would be fairly simple to add a Vbe multiplier and outputs to the circuit.
If this is is correct would you choose bipolars (with drivers) or mosfets for the outputs, and would you still use the inverting configuration?
Regards,
Jam
If you were to update the JC-3, would this be the topology you would use? It would be fairly simple to add a Vbe multiplier and outputs to the circuit.
If this is is correct would you choose bipolars (with drivers) or mosfets for the outputs, and would you still use the inverting configuration?
Regards,
Jam
john curl said:
Mr Curl,
Cascoding could work good, but would'nt be easier to use other output devices? (better matched ones)
Could you explain me why it has low gain? I thought that dif pairs had a very high gain. Are dual differentials different?
So, can hitsware's schematic be used as if, without feedback?
What would JC do.......
Change the resistor connecting the sources of N pair and P pair of JFETs to three delta connected resistors with the bottom resistor between the sources of the P JFET pair. Adjusting the value of this resistor will change the degeneration and gain for that half of the circuit to compensate for the N channel MOSFET's greater transconductance than the P channel MOSFET. The parallel combination of the other two resistors will set the bias current of the JFETs independently of the value of degeneration resistor for the P pair of JFETs. You also need to cascode the JFETs for supply voltage above about +/- 20 volts. R1 and R3 will set the bias for the the front end and output stage and will be something different than value shown on the schematic below.
Change the resistor connecting the sources of N pair and P pair of JFETs to three delta connected resistors with the bottom resistor between the sources of the P JFET pair. Adjusting the value of this resistor will change the degeneration and gain for that half of the circuit to compensate for the N channel MOSFET's greater transconductance than the P channel MOSFET. The parallel combination of the other two resistors will set the bias current of the JFETs independently of the value of degeneration resistor for the P pair of JFETs. You also need to cascode the JFETs for supply voltage above about +/- 20 volts. R1 and R3 will set the bias for the the front end and output stage and will be something different than value shown on the schematic below.
Attachments
Actually, this makes a pretty lousy power amp, BECAUSE there is no loop gain with a low Z load. Makes a darn good line amp, however.
I even made the Grateful Dead line driver to drive the final mix from the mixing board to the stage with a similar configuration. All else being equal, fets are better than bipolars, but sometimes bipolars are useful in this circuit.
I even made the Grateful Dead line driver to drive the final mix from the mixing board to the stage with a similar configuration. All else being equal, fets are better than bipolars, but sometimes bipolars are useful in this circuit.
Not 2nd guessing but.......
Well, maybe not no loop gain. The Hitachi K1058/J162 pair biased at half an amp would give an output stage gain of about 5 for 4 ohms I believe. With two pair of output devices and some fairly low value drain resistors for the JFET front end to drive the MOSFET Gate to source capacitance, I bet you could get 16 or 20 dB of negative feedback. This wouldn't be a great measuring amp but might not sound too bad. I have the parts around...... maybe I will simulate it and build it if the numbers look reasonable.
Well, maybe not no loop gain. The Hitachi K1058/J162 pair biased at half an amp would give an output stage gain of about 5 for 4 ohms I believe. With two pair of output devices and some fairly low value drain resistors for the JFET front end to drive the MOSFET Gate to source capacitance, I bet you could get 16 or 20 dB of negative feedback. This wouldn't be a great measuring amp but might not sound too bad. I have the parts around...... maybe I will simulate it and build it if the numbers look reasonable.
Re: Not 2nd guessing but.......
Yes! There is a certain quality to the common emitter(source) type configuration. Sort of a fullness in the low end.......
BUT beware (maybe a sim would catch it) of sudden 'mode shifts' for lack of a better term. Since the gain of the output stage does vary so does the feedback (if used). ALSO I think some sort of "shootthrough" (too much conduction from rail to rail through the outputs) sometimes occurs........mike
Fred Dieckmann said:
Yes! There is a certain quality to the common emitter(source) type configuration. Sort of a fullness in the low end.......
BUT beware (maybe a sim would catch it) of sudden 'mode shifts' for lack of a better term. Since the gain of the output stage does vary so does the feedback (if used). ALSO I think some sort of "shootthrough" (too much conduction from rail to rail through the outputs) sometimes occurs........mike
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