Under the scheme has connected three conductors: COM (-65), GND, Driver Vcc (12V). Measured on SD rather COM, the potential at inclusion/deenergizing did not change and was equal 0V.
Well, I have no idea, how it can be, because I have simulated this schematic in LTSpice (similar to MicroCap) and I got the desired SD pulses...
If you have time can practically will try? At simulating you have considered that Vcc falls faster than potential COM/GND(200mF/47000mF)?Well, I have no idea, how it can be, because I have simulated this schematic in LTSpice (similar to MicroCap) and I got the desired SD pulses...
My schematic has NO any dependency on which voltage falls faster or slower. If the -65V rail will fall down to 25-30 volts, then this schematic will generate SD signal (if the driver voltage is still here). And at startup this will generate delayed (2-3 seconds) SD signal.
On vegalab.ru I have seen the similar principle in Korolkov's schematics, where the Vb pin was tied with 200k resistor, and the SD signal was delayed at startup and SD signal was generated if the input opamp power voltage falls lower than 12V...
BTW, do you know where is the vegalab forum now?
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Probably at deenergizing signal SD is not generated because of that Vcc falls faster than potential difference COM/GND (0/-65V) decreases, and Vcc reaches zero before-65V rail will fall down to 25-30 volts, and an inclusion delay too short and I could not fix it, I will try to check up once again. At Korolkov with Vegalab in schemes I too have noticed elements operating level SD but could not understand its circuitry yet. A site on reconstruction when it will renew work to me it is not known.
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Originally Posted by 81bas
My schematic has NO any dependency on which voltage falls faster or slower. If the -65V rail will fall down to 25-30 volts, then this schematic will generate SD signal (if the driver voltage is still here). And at startup this will generate delayed (2-3 seconds) SD signal.
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Hi,
1) when (-65V) down-to (-30v),vc-driver is already below the threshold of UVLO.
2) This circuit has other defects, eg. if switch-on psu and (Off - RE-ON), produce "PUP" becouse not have fast reset-time, (not init sequence of startup).
is not the right way to develop what you need. (constant is incorrect with a large cap) is right to use high impedance and small cap.
My schematic has NO any dependency on which voltage falls faster or slower. If the -65V rail will fall down to 25-30 volts, then this schematic will generate SD signal (if the driver voltage is still here). And at startup this will generate delayed (2-3 seconds) SD signal.
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Hi,
1) when (-65V) down-to (-30v),vc-driver is already below the threshold of UVLO.
2) This circuit has other defects, eg. if switch-on psu and (Off - RE-ON), produce "PUP" becouse not have fast reset-time, (not init sequence of startup).
is not the right way to develop what you need. (constant is incorrect with a large cap) is right to use high impedance and small cap.
driver Vcc will be still at 15 Volts even if the -65V rail will fall down to 16-17 volts, because the driver Vcc is produced using a STABILIZER. Actually UVLO is about 9V for IR2110, and minimal voltage drop on 7815 stabilizer is about 1-2V, so the driver will be still active down to 10-12 volts in supply rails. Whereas the opamp supply is produced using a 2.2K resistors, and the opamp supply will start to fall at 30-40V rails already. And THIS is producing POP at shutdown after some delay...
after fast RE-ON the delay will be shorter, it is right, but it is not a problem at all, because the driver's bootstrap cap will not discharge so fast, since the IR2110 in steady state draws very small current.
is not the right way to develop what you need. (constant is incorrect with a large cap) is right to use high impedance and small cap.
compare the costs for your schematic and for my... your is a lot more expensive than my schematic (even with 100uf cap). Is it the right way to develop what you need???
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simply doublecheck everything (especially polarity of diodes) and it will work, I am sure.
Post the photos of your small PCB for startup/shutdown and we will try to find the errors...
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Today has spent re-testing of the scheme of start/deenergizing, my assumptions have proved to be true: at deenergizing Vcc falls much faster than-65V rail will fall down to 25-30 volts and consequently there is no SD a signal after all it undertakes just from source Vcc. The source the Vcc-stabilizer 7812+capacitor 200mF, has added still 1000mF has changed nothing, pressure falls all also quickly, SD has not appeared. Tried to disconnect only-65V rail from the scheme then appears SD a signal, a question: that it is possible to change in the scheme that it functioned as it is necessary.simply doublecheck everything (especially polarity of diodes) and it will work, I am sure.
Post the photos of your small PCB for startup/shutdown and we will try to find the errors...
How the driver Vcc can fall faster than -65V rail, if the driver Vcc is derived from -65V rail via 7812 stabilizer?
To check the startup/shutdown schematic works, it is needed to disconnect the GND wire from it (NOT the -65V(COM) wire).
Please simply post the photos of your small startup/shutdown PCB here, I am pretty sure that there is an error in your PCB, since I have simulated this schematic and it worked!
At me for the stabilizer 7812 is connected not to-65V rail and to the separate rectifier on 18V, 2 fans also are connected to it! The PCB of 100 % is correctly collected, I am assured. If to connect the stabilizer to-65V rail, how you have thought that through what resistor? if to leave as now (Vcc from the separate rectifier) that that needs to be made for occurrence SD of a signal?How the driver Vcc can fall faster than -65V rail, if the driver Vcc is derived from -65V rail via 7812 stabilizer?
To check the startup/shutdown schematic works, it is needed to disconnect the GND wire from it (NOT the -65V(COM) wire).
Please simply post the photos of your small startup/shutdown PCB here, I am pretty sure that there is an error in your PCB, since I have simulated this schematic and it worked!
This changes a lot! And I was asking me, how it is possible, that 78XX stabilizer works at 65 Volts in your schematic, because usually they have an overvoltage protection at 35-40V.
Use separate rectifier for the fans at the same 18V AC, so they do not discharge the driver vcc so fast...
(or simply disconnect them temporarily for test purposes)I would recommend to leave the 7812 stabilizer for the driver vcc. Also, if the startup/shutdown PCB is built correctly, why you do not have the SD signal at startup?
I have simulated this schematic, there is nothing to produce the problems...
Has just conducted tests... Has connected + the stabilizer 7812 through the resistor 4,7K to GND, without connection of the amplifier the delay scheme worked, was SD a deenergizing signal, has then connected the scheme to the amplifier and at inclusion the stabilizer 7812 and the driver 2110 has blown upI have simulated this schematic, there is nothing to produce the problems...
In what the reason ?Has just conducted tests... Has connected + the stabilizer 7812 through the resistor 4,7K to GND, without connection of the amplifier the delay scheme worked, was SD a deenergizing signal, has then connected the scheme to the amplifier and at inclusion the stabilizer 7812 and the driver 2110 has blown up
Oh, it is very bad news
Was there any capacitor before 7812 after 4.7K resistor? 7812 can very often start to oscillate...
Please, post your final blown scheme here (with all connections of startup/shutdown PCB, with 7812 connections, etc), we will try to find the reason. I think the output mosfets are blown too
Has just conducted tests... Has connected + the stabilizer 7812 through the resistor 4,7K to GND, without connection of the amplifier the delay scheme worked, was SD a deenergizing signal, has then connected the scheme to the amplifier and at inclusion the stabilizer 7812 and the driver 2110 has blown up
And as I said, 7812 is not intended to work at 65V (even via some resistor). Also, was the 4.7K resistor blown too?
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