lets see... both the plate and cathode voltages ate 82V. divide that by 1A and you get 82 ohms for each.
what am I missing?
dave
You are missing what was stated in post 673. Please re-read it.
The impedance of a pair of nodes is the change in voltage (plate to ground) across the nodes due to the currents applied across those same nodes. The contribution to a voltage (plate) from a current applied to another node (cathode) does not figure in to the impedance at the plate.
The impedance of a pair of nodes is the change in voltage (plate to ground) across the nodes due to the currents applied across those same nodes. The contribution to a voltage (plate) from a current applied to another node (cathode) does not figure in to the impedance at the plate.
By definition, the plate and cathode impedances are Zpp and Zkk respectively. The plate and cathode voltages receive contributions from Ip and Ik respectively, weighted respectively by Zpp and Zkk.
But the plate and cathode voltages also receive contributions respectively from Ik and Ip, weighted by impedances Zkp and Zpk respectively, which are impedances of neither the plate nor the cathode.
But the plate and cathode voltages also receive contributions respectively from Ik and Ip, weighted by impedances Zkp and Zpk respectively, which are impedances of neither the plate nor the cathode.
Then why doesn't spice take this into account and give the numbers you claim?
To get the results you predict, you must remove either current source which creates a different circuit altogether.
You would also have to argue that feedback doesn't alter plate impedance, but it sure changes output impedance.
dave
To get the results you predict, you must remove either current source which creates a different circuit altogether.
You would also have to argue that feedback doesn't alter plate impedance, but it sure changes output impedance.
dave
Dave, Just what do you think Spice does that contradicts what I have said? Please be very clear in what you believe I have said and why you think it contradicts spice. I simply don't see it.
Note that Vp = Ip Zpp + Ik Zkp.
Zpp is the plate impedance. It contributes with Ip only partially to the plate voltage. The other contribution is from the Ik Zkp term which has nothing to do with plate impedance.
When you divide the plate voltage by the 1A plate current, you are including the contribution of Ik to Vp. But that contribution has nothing to do with the definition of impedance as applied to the plate. And yet you include it in your calculation for impedance. This is the root of the problem.
I don't follow your third sentence at all.
Note that Vp = Ip Zpp + Ik Zkp.
Zpp is the plate impedance. It contributes with Ip only partially to the plate voltage. The other contribution is from the Ik Zkp term which has nothing to do with plate impedance.
When you divide the plate voltage by the 1A plate current, you are including the contribution of Ik to Vp. But that contribution has nothing to do with the definition of impedance as applied to the plate. And yet you include it in your calculation for impedance. This is the root of the problem.
I don't follow your third sentence at all.
we are talking about two different things here. I agree the plate impedance and cathode impedance of a tube are fixed by the DC operating conditions. I fail to see how that is relavent to the discussion of a cathodyne.
What is important here is the output impedance from the plate and cathode of a cathodyne. you know the number you would use to calculate bandwidth wrt the miller capacitance of the following tube.
dave
What is important here is the output impedance from the plate and cathode of a cathodyne. you know the number you would use to calculate bandwidth wrt the miller capacitance of the following tube.
dave
The plate and cathode impedances are fixed by the DC operating conditions of the tube and the surrounding circuit topology and component values. It is relevant to our discussion to point out that in a linear circuit such as this, they are completely unaffected by the signal levels of current sources to which they are connected and resultantly, to whether or not they are "balanced."
I do hope that you understand why with Ik and Ip connected to a Cdyne, you can't simply divide total Vp by Ip to get the plate impedance.
Give me a few minutes to work out the calculation of bandwidth that you refer to.
I do hope that you understand why with Ik and Ip connected to a Cdyne, you can't simply divide total Vp by Ip to get the plate impedance.
Give me a few minutes to work out the calculation of bandwidth that you refer to.
Dave, I believe you will find that to a good approximation, with equal miller capacitances C on the P and K, that the bandwidth is a little above gm/(2 pi C) Hz. You have a simulator open - why don't you check this for me? I may have goofed up the derivation.
This result is not to be confused with output impedance. The Radiotron Designer's Handbook 4th edition has an excellent discussion of this on page 330 (I know this because I've often visited it.) It discusses bandwidth and makes it clear that Zpp and Zkk are what I stated they were.
This result is not to be confused with output impedance. The Radiotron Designer's Handbook 4th edition has an excellent discussion of this on page 330 (I know this because I've often visited it.) It discusses bandwidth and makes it clear that Zpp and Zkk are what I stated they were.
The reason the bandwidth is higher than the low frequency output impedances would suggest is that as frequency goes up, the grid voltage amplitude remains the same and the cathode tries to follow it. But the cathode impedance is falling due to capacitance, so the Cdyne current is rising, keeping up with the falling impedances. At some point though, the circuit gives up and the frequncy response starts to fall.
Of course they do- continuity requires it, unless you've overcome the First Law.
Demonstrably, the currents don't cancel. The sim proves this. It shows that they cause non-zero, equal and opposite P and K voltages. And by Ohm's law, voltages across resistors require currents. If the currents canceled, the voltages would be zero. But they're not. And again, the sim proves this.
Please clarify what "continuity" requires. Step by step. And which First Law? I know of several.
Please clarify what "continuity" requires. Step by step. And which First Law? I know of several.
I think I see your problem. You're bothered by the fact that the total current going into the Cdyne is equal to the total going out.
Well, that's how Cdynes (and triodes) work! That's exactly what happens when the Cdyne AC grid voltage is applied and the P and K drive the output stage miller capacitances and bias resistors. There is no difference.
Well, that's how Cdynes (and triodes) work! That's exactly what happens when the Cdyne AC grid voltage is applied and the P and K drive the output stage miller capacitances and bias resistors. There is no difference.
If they're "equal and opposite," you're dumping into the plate and pulling out of the cathode (or vice versa). That's your sign slippage.
In a triode, the current out of the cathode must be equal to the current into the plate - there is nowhere else for it go (unless through the grid.)
These currents must go through the P and K loads - out of one, into the other. There is nowhere else for them to go. This is precisely what happens with Ik = -Ip, which can be considered to be loads.
If we weren't pulling out of the plate what we were putting into the cathode, the triode would be accumulating charge and violating Kirchoff.
This is simple to prove. Set up a simulation of any of the circuits under discussion and ask it to report the currents. You will see that there is no sign slipage.
If you continue to insist that there is, I must ask you to prove it, step by step, so that we can see where the problem lies. One sentence assertions with no proof or justification to back them up are completely insufficient as viable arguments.
Prove your case.
These currents must go through the P and K loads - out of one, into the other. There is nowhere else for them to go. This is precisely what happens with Ik = -Ip, which can be considered to be loads.
If we weren't pulling out of the plate what we were putting into the cathode, the triode would be accumulating charge and violating Kirchoff.
This is simple to prove. Set up a simulation of any of the circuits under discussion and ask it to report the currents. You will see that there is no sign slipage.
If you continue to insist that there is, I must ask you to prove it, step by step, so that we can see where the problem lies. One sentence assertions with no proof or justification to back them up are completely insufficient as viable arguments.
Prove your case.
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