Thanks Andrew. It's to hear your reasons and your success at doing something very similar. I agree with Joseph K that this approach isn't a universal solution and that you have to be careful because all sources are not low impedance. But this is DIY and you can try this approach if you know you have low source impedance.
Jac
I made some test on my ADA4627 My_ref boards.
A 4,7pF cap across pins 2 and 6 lowered the offset a bit (to around 130 mV peak), but didn't solve the problem. Nor did removing C13.
Anyway, offset slowly rises from switch on, reaches a peak level, then slowly goes down. When i say slowly, i mean it takes nearly 10 min to reach the peak, then more than an hour to go down to low levels (about 20 mV).
The only test that managed to bring offset to zero was bypassing R13, but i guess that can't be done if i want the amp to play good...
If a 4.7pf cap is lowering offset from over 200mV to 130mV peak, surely that's pointing towards something - can you try with more capacitance?
Yesterday night i tried adding a second 4,7pF cap between pins 2 and 6. No effect at all on offset.
This is an expected result, because:
1) i observed the offset using an oscilloscope, in contact with George, and we found it is a real offset, not an oscillation
2) a real DC offset exists before the ADA4627, i measured it across R13 and i found a value of 3,9mV on right board (the one with 120/130mV peak offset)
3) the first output offset i measured was 230mV, but it was changing every time i measured it, so i can't be sure that lowering it to half was due to adding a 4,7pF capacitance on left board. On the right board, in facts, adding the first (and now second) capacitance didn't have any effect.
N.B. I tested each board separately.
So i think there is a real Dc offset that originates somewhere between inputs and ADA4627. More:
- removing C13 doesn't remove the offset
- shorting the inputs doesn't affect the offset
- loading 6 ohm on output doesn't affect the offset
- bypassing R13 with a wire totally removes the offset (to 0mV)
- offset changes slightly or more largely every time i disconnect a board, take it off and reconnect it
- offset changes upon day's hours: higher at night, lower at mid day
- when i switch on, offset is currently about 20mV on left board and 60mV on right board. Then it slowly goes up and in a 10 minutes time reaches 40mV left peak and 120mV right peak. Then it slooowly goes down, until it reaches 4mV on left board and -9,3mV on right board (yes, negative value), that are stable from then on
- the time it needs to reach these min, acceptable levels is not constant; it is higher at night (max 3/3,5 hours) and lower at day (min 1/1,5 hours)
That's why i now think it has to do with a capacitance charging or with a temperature raising; the difference between night and day behaviour makes me favour the second.
Anyway, all this is VERY strange...
If i literally short the input, the offset remains.
But if i short R13, the offset is removed...
Ok, that's it
View attachment My_Ref_FE RC - Schematic.pdf
R13 is the same as latest G.B.10 schematics.
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input offset current is leading to the output offset error.
The DC resistance seen by the two inputs should be matched to minimise the voltage difference between the two inputs. (slight trimming of these resistances may be necessary to correct for production tolerances in the offset currents)
Leaving the inputs with unmatched resistances increases the offset and also increases the temperature induced changes. Ic1 pin3 sees 12k, whereas Ic1 pin2 sees 103k3.
There is a further error due to R11, if there is a DC current passing through this resistor.
Sort the circuit first !
The DC resistance seen by the two inputs should be matched to minimise the voltage difference between the two inputs. (slight trimming of these resistances may be necessary to correct for production tolerances in the offset currents)
Leaving the inputs with unmatched resistances increases the offset and also increases the temperature induced changes. Ic1 pin3 sees 12k, whereas Ic1 pin2 sees 103k3.
There is a further error due to R11, if there is a DC current passing through this resistor.
Sort the circuit first !
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Well if C13 is in place and you short the input, a DC fault @ R13 will not be removed, but shorting R13 will remove it. So the problem is apparently an input bias offset. You could lower R13, but you need to make C13 bigger then and your source must be able to drive the lower impedance.
Try 20 uf as C13 and 10K as R13 and measure the offset. Might be necessary to change the R12 - C12 combo as well to 330 and 2n2.
Andrew, input offset current? Maybe You meant input bias current? Because that is that actually flowing in pins. Offset current is just the difference between input bias currents.
Talking of which, input bias current of the ADA4627 is 1pA typical, 5pA worst case.
Now, to the scientific calculator mode on: 1pA is 10^-12A.
Voffset(Iin) = Iin * Rin = 10^-12A * 10^5ohm (R13=100kohm) =1* 10^-7 V.
That is, the input bias current provoke 100nV offset voltage on the input resistance, R13=100kohm. Worst case 500 nV, half a microVolt.
Oops, did I say that in my guessing I had choosen a FET input opamp?
Now, the minimum input offset VOLTAGE guaranteed is from 70-200uV for this chip.
that is ~ 1000 times more than the input current provoked offset voltage. (Typical)
So, let's make it clear: A properly functional amp assembled with this chip Do Not Care about the impedance seen by it's input pins, on the contrary to the bipolar opamps, like LME49710, for example.
As it was also pointed out, by guessing, that these modern FET opamps might have orders higher common mode rejection, regarding the voltage dependence of the input FET capacities. That is another why, by pure guessing, it had been chosen -- So even when it is driven by high impedance on it's input, it does produce orders of less common mode distortions than, for example, a bipolar type chip, like LM318 or LME49710.
So there goes out of the window the scientific reasoning for the need for lower input impedances.
Talking of which, input bias current of the ADA4627 is 1pA typical, 5pA worst case.
Now, to the scientific calculator mode on: 1pA is 10^-12A.
Voffset(Iin) = Iin * Rin = 10^-12A * 10^5ohm (R13=100kohm) =1* 10^-7 V.
That is, the input bias current provoke 100nV offset voltage on the input resistance, R13=100kohm. Worst case 500 nV, half a microVolt.
Oops, did I say that in my guessing I had choosen a FET input opamp?
Now, the minimum input offset VOLTAGE guaranteed is from 70-200uV for this chip.
that is ~ 1000 times more than the input current provoked offset voltage. (Typical)
So, let's make it clear: A properly functional amp assembled with this chip Do Not Care about the impedance seen by it's input pins, on the contrary to the bipolar opamps, like LME49710, for example.
As it was also pointed out, by guessing, that these modern FET opamps might have orders higher common mode rejection, regarding the voltage dependence of the input FET capacities. That is another why, by pure guessing, it had been chosen -- So even when it is driven by high impedance on it's input, it does produce orders of less common mode distortions than, for example, a bipolar type chip, like LM318 or LME49710.
So there goes out of the window the scientific reasoning for the need for lower input impedances.
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Now, what output offset we can expect from a properly operational ADA4627Br chip applied as control opamp in an FE unit?
As told up here, the input offset voltage, Voffs is the one that dominates, regardless of input impedances. As mentioned, it is between 70uV - 200uV (200uV probably is full temperature range, like at 100 centigrades)
Voffset_OUT= Voffs * A (A=30db) = +-2mV typical, +-6mV worst case.
Confront it with the values measured by Luca in equilibrium..
I can also add that 10 other cases completed up to now, we had seen the output offset going exactly by this, oscillating between zero and max 6-7mV. Typically 2-3mV.
At once, upon turn on.
So, there is something going astray in the circuit of Luca.
And it's a current, appearing across the input resistance, R13 (100kohm).
It must not come from an operational, good health FET input chip.
I start to suspect of the health of the chip.. But would leave that as last resort.
Ciao, George
As told up here, the input offset voltage, Voffs is the one that dominates, regardless of input impedances. As mentioned, it is between 70uV - 200uV (200uV probably is full temperature range, like at 100 centigrades)
Voffset_OUT= Voffs * A (A=30db) = +-2mV typical, +-6mV worst case.
Confront it with the values measured by Luca in equilibrium..
I can also add that 10 other cases completed up to now, we had seen the output offset going exactly by this, oscillating between zero and max 6-7mV. Typically 2-3mV.
At once, upon turn on.
So, there is something going astray in the circuit of Luca.
And it's a current, appearing across the input resistance, R13 (100kohm).
It must not come from an operational, good health FET input chip.
I start to suspect of the health of the chip.. But would leave that as last resort.
Ciao, George
George,
Nice reasoning.
As you say, for there to be a voltage across R13, there has to be a current through R13 with a source after C13, the input DC blocking cap. We can tell that because shorting the input doesn't change it. To me, that means that there are only two places for that current to come from if shorting the input doesn't change the situation, C12 and a DC voltage difference appearing at the +/- inputs of the opamp.
If C12 were leaking, I still don't see that creating a current across R13. If something after the opamp were trying to pull a DC voltage difference between the inputs, a healthy opamp would eliminate that difference. It seems to me like the opamp is in poor health. It might be time to swap out the opamp for any JFET input opamp to see if it fixes the offset.
What do you think?
Jac
I'm still in favor of Josep's first idea: a leakage current from a supply rail due to some "stray" resistance, likely some solder flux residual (perhaps under the OpAmp).
To produce a few mV across a 100K resistor is enough to have a few tens of nA flowing through it. From a 15V supply, all it takes is a leakage resistance in the order of the GigaOhms. That is, a less-than-perfect insulation. A bit of slightly conductive and/or hygroscopic dirt (such as some residual of a acid / water-soluble solder flux), a bit of humidity from the air, and there you go.
Also the variations of the offset with time (and daytime) could be explained with it, in terms of variations of temperature and humidity of the leakage path.
An easy proof could be done by adding a smaller valued resistor (say 1k) in parallel with R13. If the offset value will be reduced accordingly, you'll have the proof of a leakage current (of course, the leakage current could also come from a defective/damaged OpAmp... but it would seem rather strange that you have got faulty OpAmps on both channels).
My 2¢.
To produce a few mV across a 100K resistor is enough to have a few tens of nA flowing through it. From a 15V supply, all it takes is a leakage resistance in the order of the GigaOhms. That is, a less-than-perfect insulation. A bit of slightly conductive and/or hygroscopic dirt (such as some residual of a acid / water-soluble solder flux), a bit of humidity from the air, and there you go.
Also the variations of the offset with time (and daytime) could be explained with it, in terms of variations of temperature and humidity of the leakage path.
An easy proof could be done by adding a smaller valued resistor (say 1k) in parallel with R13. If the offset value will be reduced accordingly, you'll have the proof of a leakage current (of course, the leakage current could also come from a defective/damaged OpAmp... but it would seem rather strange that you have got faulty OpAmps on both channels).
My 2¢.
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Unixman,
excellent point. It's well worth pursuing. You could change the opamp and still have the problem because it was the stray resistance. And I agree it would be surprising to have two bad opamps unless there were a batch issue.
You make me want to go clean my boards again, even though they are working properly and have been cleaned when built.
Jac
excellent point. It's well worth pursuing. You could change the opamp and still have the problem because it was the stray resistance. And I agree it would be surprising to have two bad opamps unless there were a batch issue.
You make me want to go clean my boards again, even though they are working properly and have been cleaned when built.
Jac
I don't know, i bought them from Mouser so i was sure they're ok, but you never know...
There is another chance: i don't have SMD tools to solder, so i took the boards to a local cell phones tech lab to have the opamps replaced. It didn't look so clean, orderly and professional (i live in a small provincial town)... Maybe the problem was not in the opamps themselves, but in the soldering process: this would justify both of them being damaged.
But, to be honest, i lean towards a DC leakage, and my suspects point to onboard input connectors, i'll check that next: i observed the pads/traces connections seem quite dirty, as i had some problems soldering the connectors (in facts i had to replace one 0V trace using wire, in the board with lower offset).
Anyway, today at lunch time measured peak offset was 30mV on both boards, with stable final offset a bit below 10mV (positive on both boards), that's acceptable to me, much better than the original 230mV offset..
And sound is very good too! Replacing LM318 using ADA4627 made it quite better!