My F5T V3 build

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Buzz from my understanding, the diodes only affect the maximum amperage that can be fed into the mosfets (obviously in max AB operation).
The class A operation usually ends after the 2xBiasAmperage is reached, which is normally way bellow even than the vanila F5 max amperage.
Again from my understanding, if you want to increase the Class A range, you have to increase the bias and use bigger heatsinks (and maybe bigger passive components)
 
Buzz from my understanding, the diodes only affect the maximum amperage that can be fed into the mosfets (obviously in max AB operation).
The class A operation usually ends after the 2xBiasAmperage is reached, which is normally way bellow even than the vanila F5 max amperage.
Again from my understanding, if you want to increase the Class A range, you have to increase the bias and use bigger heatsinks (and maybe bigger passive components)

I beleive that you are correct. Just like that official stamp!

all you need is to listen carefully , and you'll hear the KLUNK!

:devilr:

Problem is, I can get mine to KLUNK with just one pair.
:p
 
Set the Vrs bias voltage to say 100mVdc. We can scale from this starting figure later.

With a 0r2 value for Rs the bias current will be 0.5Adc.
When the amp is operating with an 8r0 load and delivering 0.5Aac to the load, the output devices are passing AC waveforms that vary about that 0.5A starting value by +-0.25A*sqrt(2) = 0.35A, resulting in a sinusoidal current ranging from 0.15Adc to 0.85Adc. The current flow does not reverse so we are still dealing with DC as far as each output device is concerned.

Now increase the load current to 0.7071Aac, for which the maximum value is 1Apk (for a sinewave).

The device currents now range from 0Adc to 1Adc. While one device is not passing (0Adc) the other device is passing maximum current (1Adc) and all of this current passes to the load. Note the load in this case is the parallel combination of the external 8r0 test resistor and the internal feedback resistors and any Zobel and such like, if fitted.

The voltage across the Rs also varies with the load current. Vrs ranges from 0mVrs to 200mVrs for that 0.7071Aac of load current.

Now let's look at the transition to the region beyond ClassA. Let's output a current to a test load of 1Aac, requiring a maximum output of 1.414Apk to the load.
The device currents now range from 0mAdc to 1.414Adc. But they are no longer sinusoidal. There are periods during the waveform cycle where one device is "off" and the other device is controlling the output current alone with no help from it's complementary partner. The Vrs is now ranging from 0mVdc to 282.8mVdc.

Let's insert that parallel diode to bypass the Rs, if required.

The voltage across the diode for all the above operating currents varies from 0mVdc to 282.8mVdc. Looking at the Id vs Vf graph you will find that the diodes bypasses a virtual zero current.

Now we come to scaling that starting value for the bias voltage.
Let's double Vrs from 100mVrs to 200mVrs.
I am going to stop and ask you to go back through that previous description of the operation and fit in the new values of currents and voltages for this new starting condition. I will call this part II.
If anybody gets stuck I will type up the repeat description modified to reveal the part II values.

There will be a part III.
 
Member
Joined 2006
Paid Member
Excellent and thorough, Andrew. I am sure everyone greatly appreciates your time. The smart ones will take them time to work through the math. If memory serves me, the AC voltage variation across my Rs in the single pair version rarely exceeded 100mV.

Can I change that with a scope input of 10V? I know now to put a cap in front of it! :eek:

I too would be interested in a simple mans formula for maxxing the F5T out from a signal perspective to get the diodes to dance.
 
..............the output devices are passing AC waveforms ..................................While one device is not passing (0Adc) the other device is passing maximum current (1Adc) and all of this current passes to the load................................There are periods during the waveform cycle where one device is "off" and the other device is controlling the output current alone with no help from it's complementary partner.

So your example is explaining what is happening with one of the two mosfets that make up the pair.
you can see the effect in either the upper or the lower of the complementary (or quasi complementary) pair.
It looks like you have not read the post carefully enough.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.