I was thinking about this for a while myself. On first glance it doen't make sense however if you take into consideration how the zero tempco foil resistors are made it can make sense.
What they are is a strain gauge bonded to a surface that has an effective expansion with temperature that compensates for the change in resistance of the foil with temperature. When the thermals are changing slowly (DC) or quickly enough to be integrated (mid audio) it could work really well (and it does). For that frequency range where the resistor is continuously changing at a rate similar to the time constant of the substrate you can see how it may actually amplify the changes.
The only real option then are the evenohm wirewound precision resistors. They can be made to be accurate (.01%) to well past 100 K. The cost makes naked Vishay's seem cheap. I know of one source today: Resistors - Oil Filled - Epoxy Encapsulated | Ohm-Labs, Inc.
Being the "other individual which has corroborated" this finding I can confirm that metal foil resistors have a poor cost-performance ratio for low distortion work at the lower end of the audio frequency range. A typical metal foil resistor has about 10 dB lower distortion at 10 Hz than a standard 50 ppm MiniMELF part. Using 4 MiniMELFs in series gives similar if not better distortion performance, at a fraction of the price.
Metal foil resistors have very low voltage coefficient and excess noise (I have not been able to detect any sign of it yet). But as Bruce Hofer (and Demian above) notes, their quoted temperature/power coefficient applies only to equilibrium states, where the substrate is at the same temperature as the metal foil. Under AC conditions, particularly near 10 Hz, significant dynamic temperature differences appear to exist which cause resistance variations and thus distortion.
US patent 4,677,413 suggests an improved metal foil resistor using a substrate with near-zero thermal expansion coefficient which would not show this issue and probably form the "ultimate audio resistor". Unfortunately, currently no such substrate with otherwise suitable characteristics seems to be available (according to the info I got from the Vishay foil group).
Samuel
Thank you very much for sharing that!
While scanning through your thesis document, a few questions came to mind. (If I skimmed too fast and missed the answers it is quite proper to direct me to re-read it.)
- The discussion on distortion in passive components makes several mentions of using series and/or parallel combinations of resistors to reduce distortion. Would you get much the same improvement by going to components in larger packages with higher power ratings - e.g., RN60 resistors rather than RN55 or consumer-grade parts?
- Your discrete opamp design doesn't use the series/parallel tactic at any location. Are there places in that design where doing so may make an improvement?
- You mentioned using multi-layer PWB's (4-layers, if I recall correctly). What was your philosophy for employing the layers - e.g., signal traces on internal versus external layers, separate layers for positive and negative supply traces versus both supplies routed on one layer (or both supplies plus ground on one layer), etc?
- On the discrete opamp design, isn't 16 mA of idle current a little high for a TO-92 device like the BC550/560? Their static dissipation will be about 50% of the rated maximum. That's within spec, but higher than I like to plan for in a design. Wouldn't a TO-126 device like the KSA1220/KSC2690 (or even an enhanced TO-92 like the KSA916/KSC2316) be better choices? Or is the higher Ft of the BC550/560 more important?
- (Finding suitable substitutes for the 2SC2240 has already been discussed in multiple threads.)
Dale
It can be expected that parts with higher power rating and otherwise similar performance show lower distortion from power coefficient effects. Voltage coefficient is however unlikely improved, and you don't get the statistical averaging which reduces the effects from outliers.
No. None of the resistors in a typical operational amplifier see significant voltage or power swing, and they are usually in series with a semiconductor diode which renders their contribution negligible.
That's not easy to answer in a couple of words, and I don't recall the details anyway. For the redesign I'm working on I'm using the top layer for most of the signals, particularly those which need low parasitics. The upper intermediate layer is a ground plane. The remaining two are used for less critical signals (or such which should not capacitively couple to those on the top layer) and power supplies.
Complementary power supplies to amplifiers should be routed as differential pairs unless you're sure that the amplifier they connect to has very low harmonic content in its power supply current.
I'm not sure if a 50% derating isn't sufficient for an application which is safety-uncritical and likely has very low power-on time; in any case under operating conditions the average dissipation is lower, which helps. Nowadays I'd probably use a PZT3904/PZT3906 pair for the output which is amongst the best regarding fT while still running on 30 V.
Samuel
Are surface mount thin film and metal film resistors equivalent to the through hole parts in linearity? You can cram a lot more in a given space for even less money. I suspect a network with some compensation for frequency can be built using surface mount resistors on both sides of a PCB. Using quality metal film resistors in networks to reduce the individual stresses looks to be a good solution, unless you need really high precision. Then you need something better.
I did find this : http://www.ece.unm.edu/summa/notes/ESDN/ESDN 2.pdf which discusses wirewound resistors with uniform resistance to several MegaHertz. And this which is a bit of history for resistor fanatics : http://www.nist.gov/calibrations/upload/rp1323.pdf from 1940. We have not moved a lot further, with the exception of Josephson Junctions which are not useful for anything but calibration.
I did find this : http://www.ece.unm.edu/summa/notes/ESDN/ESDN 2.pdf which discusses wirewound resistors with uniform resistance to several MegaHertz. And this which is a bit of history for resistor fanatics : http://www.nist.gov/calibrations/upload/rp1323.pdf from 1940. We have not moved a lot further, with the exception of Josephson Junctions which are not useful for anything but calibration.
I have found that flat chip thin film resistors show higher distortion from power coefficient for a given power rating, and seem to have a tendency for more samples with significant voltage coefficient. MiniMELF appears to be equivalent to trough hole parts.
The higher power coefficient effect of flat chip vs. cylindrical resistors is probably related to the lower peak power capability of the former, and the higher voltage coefficient perhaps a result of different trim techniques.
Samuel
This is consistent with reports from others who have tested sm resistors. IIRC, D.Self also did a test of various types and that is the conclusion I drew from his distortion graphs. One of the best thru holes are the Dale mf types. [Researchers at LLNL decided to use the Dales for all their stocking resistors used in their prototyping/designs.]
-Richard Marsh
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Would the rhopoint "Econistor" wirewound resistors compare to the above? They seem to be about as expensive, or maybe even slightly cheaper, than the Vishays, and are also available at 0.01%: 8G16 / 8E16 series wirewound Econistor 3ppm/°C - Precision (Through Hole) - Resistors - Components
These are excellent parts--I'm using them to verify my measurement setup. Their residual distortion appears to be more than one order of magnitude below that of metal foil parts, and with my current setup I cannot clearly identify it. But they are inductive, large and not available in E24 values.
I have tested lower cost wirewound resistors but not yet found a part which performs as well. Distortion from power coefficient effects is always very low even for parts with 50 ppm tempco (the thermal mass of the resistance element is very high compared to thin film/metal foil resistors), but there are some specimen with significant voltage coefficient.
Samuel
I've done a second reading of your thesis paper. I now have a much better understanding of why the track-hold/sample-hold level detector offers exceptional performance. And offsetting the AC signal by the DC reference level BEFORE the actual detector is a slick trick! Thanks for a very instructive write-up.
I still need to think through the timing details and probably try some simulations - the value you give for the sampling pulse width (32 uSec) is obviously too long for the top decade of the oscillator's range. Does the detector look at only, say, every tenth cycle of the oscillator signal, rather than every cycle? My intuition tells me that would degrade stability of the amplitude control loop.
Would you (or any of the other Wise Sages participating in this thread) give me some insight into another decision concerning the circuit design architecture? The oscillator fine tuning is done with what is essentially a multiplying DAC (MDAC) based on a binary-weighted resistor array. Why was this selected over an R/2R ladder? It seems like the R/2R approach offers several advantages:
- The R/2R inherently offers the distortion-reduction effect of resistors in series
- For a DIY or even low-volume commercial constructor, it's easier to obtain precision step sizes at lower cost: you buy a moderate quantity (say, 100 pieces) of resistors with the same nominal value, and use pairs in either series or parallel to get the 2:1 ratio for the "R" and "2R" legs. Of course you can manually measure parts to get a matched set, but the purchased lot would almost certainly come from the same manufacturing run so I suspect that even parts rated for 1% tolerance would be closely enough matched to give 8-bit, and perhaps even 10-bit, precision in the R/2R ladder without ANY sorting or measurements.
- The R/2R network offers a much smaller variation of impedance versus value of the digital tuning word, both as the load impedance to the previous (driving) stage, and as the source impedance for the integrator opamp.
Thanks again for your effort and contributions.
Dale
In a track and hold - sample and hold system The track and hold switch is opened at or near the peak of the sine. The sample stage switch is closed at the same point. The sampling is of the held peak from the track and hold. So yes at frequencies having a period shorter than the sample period the sample will extend over multiple cycles.
In the system one and with my oscillator the timer (mono) is reset on the edge of the zero crossing detector. If the period of the frequency is shorter than the fixed pulse width of the mono the reset shortens the pulse width.
I haven't looked closely enough at SG's design to see how he handled this.
I don't see any reason not to use an R2R rather than binary weighting. I used a pair of Mdacs in my oscillator for tuning. I'm considering doing a discrete R2R with relays for switches. The Mdacs are faster though and one can sweep between ranges. It would be interesting to see a sweep using relays. Perhaps Samuel can shed some light on this.
Offsetting the AC with a reference before the detector is a rather old trick which is also used in the System One. The oscillator level settles with a zero voltage at the input to the detector. That leaves only a small ripple component being sampled.
In the system one and with my oscillator the timer (mono) is reset on the edge of the zero crossing detector. If the period of the frequency is shorter than the fixed pulse width of the mono the reset shortens the pulse width.
I haven't looked closely enough at SG's design to see how he handled this.
I don't see any reason not to use an R2R rather than binary weighting. I used a pair of Mdacs in my oscillator for tuning. I'm considering doing a discrete R2R with relays for switches. The Mdacs are faster though and one can sweep between ranges. It would be interesting to see a sweep using relays. Perhaps Samuel can shed some light on this.
Offsetting the AC with a reference before the detector is a rather old trick which is also used in the System One. The oscillator level settles with a zero voltage at the input to the detector. That leaves only a small ripple component being sampled.
This introduces a time lag (phase shift) into the amplitude control loop. More significantly, the track-hold must remain in "hold" mode until the sample-hold finishes acquiring the sample, and only then can the track-hold start to track the signal again. This means the amount of phase shift in the amplitude control loop will be frequency dependent. That by itself isn't a catastrophe, but it DOES require some thought and attention when designing the loop. Intuitively I think a bigger problem is that, for a given oscillator frequency, the time delay between sample updates will have a +/- 1 oscillator period variation - depending on whether the sampling pulse ends just before, or just after, the track-hold would normally be returned to "track" mode.
Are you referring to the width of the sampling pulse that controls the sample-hold acquisition time? Shortening that pulse at higher oscillator frequencies would seem to introduce a frequency-dependent amplitude error. The amount of error is essentially predictable, so it could be compensated in the system design, but that would be a notable increase in complexity.
Somewhere in this thread I believe somebody mentioned that one of the high performance oscillators - either one of the AP's, or a Krohn-Hite - used that approach rather effectively. I think they even mentioned the commercial IC type that was used, though the parts required some kind of screening or selection for the oscillator to meet spec.
I've had the same thought. I think I estimated about $75 worth of good (not great) small-signal relays to do a pair of 10-bit DAC's. And about an acre of PWB to mount them on.
Yeah, that sweep capability - or the ability to quickly (milliseconds) shift between frequencies - is an exciting idea. In his thesis paper, Samuel said that integrated MDAC's, and even FET-switched discrete DAC's, caused too much distortion for the performance level he was striving for. He may have alluded to some preliminary experiments that supported this claim, but I don't think he mentioned any measured values.
Did you mean "see it", or "hear it"? That conjures up visions of the few times I was inside a telephone central office (CO) in the days of electromechanical switching. Clickety-clackety-kachunk! I was only in CO's with crossbar switches, though I once saw a small PBX with a step-by-step rotary switch. The telco inside-plant guys said a step-by-step CO was deafening at peak hours.
If I had seen that technique before (and it seems like I should have encountered it at some point in the last half century or so), I have forgotten it. Samuel did a great job of pointing out the advantages - including the fact that the error signal you want to find and process becomes a variance from zero volts, rather than a small deviation riding on top of a larger level.
Dale
In the thesis design, the sampling is delayed until the next suitabel peak appears. That wasn't a smart move because as you say, this changes the dynamics of the control loop considerable (but it did work). I'm now using, as in the System One, a ~50% duty-cycle limit which shortens the sampling pulse at higher frequencies. This has less effect on the control loop dynamics.
All of this is correct. But the "constant impedance" characteristics is exactly the opposite of what we want, particularly WRT the source impedance of the integrator. The source impedance of a R2R network is lower than that of a parallel-binary string for a given frequency setting (particularly at low frequencies). This means that the noise gain of the integrator opamp is higher with the R2R network, i.e. its noise and distortion contribution is higher. See also this post.
Whether this matters or not, or if it is worth the disadvantages, is a question of context (desired performance and optimization of the other circuit elements). For the redesign I'm working on I can say that I just barely reach the (ambitious) THD+N figures I've set out, and the use of a R2R network would very likely prevent reaching the specs (although I didn't try/calculated).
Samuel
Referring to the technique of offsetting the signal before the detector, am I correct in thinking that the technique works for a sample-hold system, but does not make any difference in non-sample-hold system, such as a peak detector or average detector?
The reason that I ask is that a conventional detector with diodes to perform rectification has no way to have the signal go back down in the negative direction when the ac signal becomes smaller unless the is a pull-down resistor or current source pulling it down.
Cheers,
Bob
Hi Bob,
The system zero doesn't necessarily have to be zero volts. In the case of using an ADC for the a sampler the ADC I'm using has a range of 0 to xV. Even if a bias is placed on the ADC input to give it a +/- range the zero is the mid code of the ADC regardless of input range. There is no reason why an analog sampler can't be set up with a non zero volt system zero. You would just have to bias the proportional amplifier and integrator the same. I think with a bit of creative design you could use the principle with a conventional peak detector by scaling the system zero.