LME49810/STD03 parallel pairs

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let's try doing it in steps.

What output stage do you want to use for a 4ohm capable amplifier fed with +-50Vdc supply?

Friends, I'm with Andrew here. It's one thing using rule of thumb, but isn't it better to work with the facts? Remember that transistor current gain drops with increased collector current. The advertised current gain is often quoted for optimistic conditions. Use the actual load current, and the game changes (see hFE vs collector current graphs).
 
Hi,
work back from the valid audio signal maximum peak transient current.

Let's for sake of this example assume +-50Vdc supplies and an 8ohm speaker.
Peak current ~[50-3] / 8 / 0.35 ~16.8Apk.
If you assume 4 to 8ohms speakers then the transient maximum exceeds 33Apk.

There is some evidence that the 0.35 factor gives too low a result for some music types and some speaker types. I have seen some claiming 0.2 as a worst case factor.

The question is do you need pre drivers with the LME49811 to drive a 4 ohm load. Taking Andrew's 33Apk - split that number in half to look at what the + or - (npn or pnp) sees. (I believe I'm correct) That's 17Apk Looking at the data sheet for 2SC5200 the SOA pulsed at 50v is between 7 and 11 A (100ms to 10ms) using three output devices at 7A give 21A capability. Ok so far? Divide the 17A by 3output devices gives 6A each for the "O" grade devices that's an hFE of 90 at 25degC, hFe of 78 at 125degC. Let's use an hFE of 80. That gives 17A / 80hFE = 0.2125A needs to be produced by the Driver. If you're worried about the output devices, use 4 of them...

Now the Driver KSC2690A SOA at 50v 0.3A at 50ms rising to 0.65A at 1 ms 0.3A > 0.2125A SOA is ok. hFE at 0.21A is approx. 170 for the "O" grade device (hFE 100 to 200) (the "Y" grade device has hFE of 160 to 320 but no graph shown). 0.2125A / 170hFE = .00125A the LME49811 makes .006 to .008A. Thats a 5x margin of safety for the Driver hFE. Put another way, if you use the .006A and divide that into the 0.2125A you need a Driver with an hFE of 35.

I think I've done this correctly and look forward to critique.

Ken
 
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let's try doing it in steps.
Hi,
you have chosen a 3pair output stage and +-50Vdc supplies.
The peak current that should be designed for is of the order of 33Apk on fast transients, certainly not continuous nor even as long as 100ms.

At peak output either the three PNP devices sink load current to the negative rail or the three NPN devices source current to the load from the positive rail.

That's about 11Apk through each 1943/5200 device.
Look at the DC current gain (hFE) vs Ic @ 25degC.
I see ~45times @ 11Apk. This is typical rather than minimum/guaranteed.
Now look at the guaranteed minimum in the data table. At 7Apk it shows 35times. Compare that 35 to the graph value of typical gain @ 7A. Does it show 80 @ 7Apk for 25degC?
You as designer have to decide whether to accept the 45 times as typical, or pulse test your actual devices or de-rate by some factor based on your experience with a range of actual Toshiba devices.

I would be tempted to de-rate to ~30times @ 11Apk and Tc=25degC, ie. ~ two thirds of the typical.

What value would you choose?
 
and the simulation says...

Hi,
you have chosen a 3pair output stage and +-50Vdc supplies.
The peak current that should be designed for is of the order of 33Apk on fast transients, certainly not continuous nor even as long as 100ms.

At peak output either the three PNP devices sink load current to the negative rail or the three NPN devices source current to the load from the positive rail.

That's about 11Apk through each 1943/5200 device.
Look at the DC current gain (hFE) vs Ic @ 25degC.
I see ~45times @ 11Apk. This is typical rather than minimum/guaranteed.
Now look at the guaranteed minimum in the data table. At 7Apk it shows 35times. Compare that 35 to the graph value of typical gain @ 7A. Does it show 80 @ 7Apk for 25degC?
You as designer have to decide whether to accept the 45 times as typical, or pulse test your actual devices or de-rate by some factor based on your experience with a range of actual Toshiba devices.

I would be tempted to de-rate to ~30times @ 11Apk and Tc=25degC, ie. ~ two thirds of the typical.

What value would you choose?

Happy new year Andrew,

I wasn't so sure about each output sinking or sourcing the full current, so I ran a simulation. Each device does half the load, not the full load. The simulation says that a 4 ohm load at 50v will use about 24Apk, and each output device will see 4A. So, 24Apk / 2 = 12A / 3 devices = 4A each, using your 33Apk / 2 = 16.5A / 3 devices = approx. 6A each, very different from 11A.

I get your point on the hFe multiplier, the graphs don't even show values for 50v. And if you're consistently driving 4ohms, use 4 output devices per side to be even safer.

Still, I believe that a single driver with no need for a pre-driver is possible for these loads from the LME49811, if, you choose the driver carefully. Why belabor this point you ask? The LME49811 has "perfectly" matched predrivers biased class A, why duplicate these with less than perfect discrete devices?

What do you think?

Ken
 

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you show a simulation of ~49Vpk and 12Apk into 4r0 (and by implication 48Vpk into the 4r0 load).
Into a 4ohm reactive speaker expect the peak transient currents to be between two times and five times the resistive load predictions.
I adopted that 0.35 factor because it fits nicely with many recommendations in this Forum and the many papers that refer to driving reactive speaker loads.

So take your 12Apk and apply a transient current factor.
You choose, but it cannot be near 1.

When we get agreement on the method of determining the output device base current we can move to step 2.
 
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As Andrew is rightly pointing out, it is necessary to design for peak transient currents at least three times the steady state peak current for 8 ohms.
This requires that the amp should be able to supply a lot of current to avoid transient distortion and even clipping.

Then, you have to use a darlington output to supply the current.

The question then is : is the behavior of push pull darlingtons for large signals not worse than single transistors from a distortion/clipping point of view.

If the answer is yes, then the best toplogy is the use of a triple stage ( Leach/Locanthi). There the driver and predriver are working in class A ( no cut off), the source impedance to drive the output transistors is very low and so on.

If this is right, then why use a 811 when the 810 is giving you two transistors with perfect balance and symmetry to make the predriver?

For real loads and operation it seems that the 810 is better suited.

Any opinion ?

JPV
 
As Andrew is rightly pointing out, it is necessary to design for peak transient currents at least three times the steady state peak current for 8 ohms.
This requires that the amp should be able to supply a lot of current to avoid transient distortion and even clipping.

Then, you have to use a darlington output to supply the current.

The question then is : is the behavior of push pull darlingtons for large signals not worse than single transistors from a distortion/clipping point of view.

If the answer is yes, then the best toplogy is the use of a triple stage ( Leach/Locanthi). There the driver and predriver are working in class A ( no cut off), the source impedance to drive the output transistors is very low and so on.

If this is right, then why use a 811 when the 810 is giving you two transistors with perfect balance and symmetry to make the predriver?

For real loads and operation it seems that the 810 is better suited.

Any opinion ?

JPV

I guess that I'm having a real hard time believing that it is necessary to design for 3x to avoid distortion and clipping. This is one area where I think I will disagree. We can agree to disagree or not. If you need to over design to such an extent, why not just increase the supply and amp design to one that better matches your speakers?

I also simulated the same design into a 4ohm reacative load created from criteria from Linkwitz's web site for a know speaker and crossover. I found that the peak load actually reduced, but extended in time. Roughly the area under the current curve was the same, but, the curve was flatter and spread horizontally. What kind of speakers are going to give these extreme loads? Have you simulated this? Or measured this? I would like to see it, not that I doubt that it exists, but rather to understand under what circumstances it exists.

You site the Leach typology - when I look at the Leach designs, the current coming out of the predriver is about 7ma, (at least the ones I've looked at) same as the current coming out of the LME49811. The LME49811 has the predrivers built in why duplicate them? When you duplicate them, you're making a quad, not a triple, where is the precedent for this?

But, hey, if you're worried that you don't have enough current going into output section the amp, use the 810.

Ken
 
If this is right, then why use a 811 when the 810 is giving you two transistors with perfect balance and symmetry to make the predriver?



Any opinion ?

JPV

The 810 drivers are baised in ClassA/B, the 811 predrivers are baised in Class A, and don't have drivers. Read the "National Opamp inflation" thread for information on what the chip designers intended.

Ken
 
The 810 drivers are baised in ClassA/B, the 811 predrivers are baised in Class A, and don't have drivers. Read the "National Opamp inflation" thread for information on what the chip designers intended.

Ken

I thought that the 811 is like the old 4702 which is a dual 811. These circuits do not have predrivers, only the 810 has two transistors to build a predriver.
Also the predriver if it is used in a triple T ( Leach) topology is not in classA/B but fully class A as is the driver. With Darlington's at the ouput of the 811, the driver ( part of the Darlington) will cut off in class A/B. With the 810 you make a triple with the 811 you make a VAS driving the output transistors but you could use a predriver then why not the 810?

As for the amount of current, do not forget that we are talking transients.
There is an interesting article from Genelec engineers in the AES showing how high these currects can go with real loads.

JPV
 
Where did you see 811 has pre drivers?
To my understanding 811 has no pre drivers. Look at the Vbe mult place.
810 has predrivers but no drivers. Look at the synoptic. (datasheet p4)

As I mentioned, read the "National Opamp Inflation" thread in the Solid State forum. Audioman54 - Mark, was involved in the design of both chips and explains this. That's how the 6 to 8 mA current is generated by the chip.
 
I thought that the 811 is like the old 4702 which is a dual 811. These circuits do not have predrivers, only the 810 has two transistors to build a predriver.
Also the predriver if it is used in a triple T ( Leach) topology is not in classA/B but fully class A as is the driver. With Darlington's at the ouput of the 811, the driver ( part of the Darlington) will cut off in class A/B. With the 810 you make a triple with the 811 you make a VAS driving the output transistors but you could use a predriver then why not the 810?

As for the amount of current, do not forget that we are talking transients.
There is an interesting article from Genelec engineers in the AES showing how high these currects can go with real loads.

JPV
I guess that I'm saying the same thing as you, the 811 has predrivers that are biased Class A, you then follow them with a driver, then output, making a Triple. If you use the 810, your predriver is biased in Class A/B losing the Class A predriver advantage.
 
I guess that I'm saying the same thing as you, the 811 has predrivers that are biased Class A, you then follow them with a driver, then output, making a Triple. If you use the 810, your predriver is biased in Class A/B losing the Class A predriver advantage.


I think there is some confusion there/

A predriver or driver is an emitter follower (voltage gain one only current gain).
This can be done as in the triple T with push pull ( npn/pnp pair) stage but biased and remaining in class A.
In the 811 you do not have a driver, you have the VAS which is a common emitter with current source in the collector.

JPV
 
OK, let's try approaching from the VAS end since Klewis refuses to complete the design task from the output end.

Take the ~7mA VAS current and assume this single ended stage can vary the output current by +-6.9mA for that 7mA bias.

Assume the medium power driver has a gain of 160.
This gives a total throughput in the driver of 6.9*160~1.1Apk.
20mA to 100mA of this passes through the emitter resistor.
That leaves ~1000mApk to 1080mApk to drive the base of the next stage, if the gain is 160 @Ic=1100mA.

Look at your chosen driver. Does it achieve a gain of 160 @ 1100mA.
The best drivers I can find get to about 80 to 90 gain at currents around 1100mA. Many drivers can achieve gains of between 30 to 50 @ 1100mA.
 
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OK, let's try approaching from the VAS end since Klewis refuses to complete the design task from the output end.

Take the ~7mA VAS current and assume this single ended stage can vary the output current by +-6.9mA for that 7mA bias.

Assume the medium power driver has a gain of 160.
This gives a total throughput in the driver of 6.9*160~1.1Apk.
20mA to 100mA of this passes through the emitter resistor.
That leaves ~1000mApk to 1080mApk to drive the base of the next stage, if the gain is 160 @Ic=1100mA.

Look at your chosen driver. Does it achieve a gain of 160 @ 1100mA.
The best drivers I can find get to about 80 to 90 gain at currents around 1100mA. Many drivers can achieve gains of between 30 to 50 @ 1100mA.

I don't think it's looked at that way, the hFe would be referenced from the 6.9mA not the 1.1A, the 1.1A is the product of the hFe x the base current. Simulation says that 2SA4793 will swing this current. Images attached.
 

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OK, let's try approaching from the VAS end since Klewis refuses to complete the design task from the output end.

Take the ~7mA VAS current and assume this single ended stage can vary the output current by +-6.9mA for that 7mA bias.

Assume the medium power driver has a gain of 160.
This gives a total throughput in the driver of 6.9*160~1.1Apk.
20mA to 100mA of this passes through the emitter resistor.
That leaves ~1000mApk to 1080mApk to drive the base of the next stage, if the gain is 160 @Ic=1100mA.

Look at your chosen driver. Does it achieve a gain of 160 @ 1100mA.
The best drivers I can find get to about 80 to 90 gain at currents around 1100mA. Many drivers can achieve gains of between 30 to 50 @ 1100mA.
 
OK, let's try approaching from the VAS end since Klewis refuses to complete the design task from the output end.

Take the ~7mA VAS current and assume this single ended stage can vary the output current by +-6.9mA for that 7mA bias.

Assume the medium power driver has a gain of 160.
This gives a total throughput in the driver of 6.9*160~1.1Apk.
20mA to 100mA of this passes through the emitter resistor.
That leaves ~1000mApk to 1080mApk to drive the base of the next stage, if the gain is 160 @Ic=1100mA.

Look at your chosen driver. Does it achieve a gain of 160 @ 1100mA.
The best drivers I can find get to about 80 to 90 gain at currents around 1100mA. Many drivers can achieve gains of between 30 to 50 @ 1100mA.

Andrew,

I think you slipped a digit. 1.1Apk should be 110mA See first simulation at 4 ohms.

I thought maybe another approach might make sense. As the data sheets don't tell us hFE at 50v why not simulate this typology until it runs out of gas.

So, the first simulation is at 4 ohms from the schematic shown. The first thing I learned is that it won't run rail to rail 50v in, 50v supply at 4 ohms. But, as I will show later it's not limited by the current from the driver. I increased the supply voltage to 55v keeping in input sin wave at 50v for all the simulations.

The second simulation changes the load to 2 ohms. Current goes up for all devices. No clipping

Third simulation changes the load to 1.5 ohms. Clips at 32 Amps, the driver is the culprit.
 

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