mateo88 said:
Indeed the second bypass RC network reduces the impedance a by about 2dB at the resonant frequency-- at least according to the sim -- but the effect of the diode snubber RC network is profound-- there's a lot of RF energy radiated by the diode -- Jim Williams at Linear Tech has talked about this RF energy in ultra-low noise measurement circuits -- so has Analog Devices -- I guess the phrase which keeps coming back to me is "otherwise unexplainable offsets" -- sounds a bit like metaphysics instead of physics --
The diode snubber is probably more important in the front end power supplies in which you are competing with millivolts or microvolts of signal (in the case of a moving coil or moving magnet amplifier, microphone or other low output transducer).
One of Williams papers discusses the electrolytic effects of mating an unplated spade connector to one that is plated -- the dissimilar metals -- think "cat whisker".
frank1 said:
note -- the simulation uses leakage inductance of 1uH -- when I measured the leakage inductance of the transformer in my HP465 low noise preamplifier it was in the millihenries -- my usual suspect LM4780 supply toroid is about 15uH. JCO for an MUR860 is about 450pF -- obviously there are diodes with much lower junction capacitance. the resonating frequency is about what is predicted knowing this L and C.
well, I will do this experiment -- i have a bunch (huge) high quality opamps -- AD797's, LT1115, LT1155, AD825, OPA's etc. -- and some crappy ones as well. With the sweep generator and spec analyzer -- if it keeps raining this afternoon I will see if I can measure changes in offset, distortion etc. -- one thing I learned making the ultra low noise oscillator is that best results were attained when everything was shielded and I used my best Pomona cables.
I'm curious about one thing. For a 3 x LM3886 parallelled, would the RC snubber be required for each chip, or is one pair (V+ and V-) enough at the supply input? The thing is, if they're required for each chip, it's gonna get mighty crowded under the board (2x .1uF + 2 snubbers for each chip)/
Hi,
when I looked at the graphs the main difference was tha big reduction in the resonant peak.
Either side of the peak, I was unable to see any significant reduction in impedance at the scale posted.
So, I stand by my first assertion.
Snubber is to attenuate the resonant peak, not general reduction in medium to high frequency impedance.
when I looked at the graphs the main difference was tha big reduction in the resonant peak.
Either side of the peak, I was unable to see any significant reduction in impedance at the scale posted.
So, I stand by my first assertion.
Snubber is to attenuate the resonant peak, not general reduction in medium to high frequency impedance.
ok, here's 3 pictures:
1) MUR860 in series with 1uH -- the latter representing transformer leakage inductance. YMMV
2) MUR860 in series with 1uH -- diode snubber consisting of 100R + 100pF
3) MUR860 in series with 1uH -- diode snubber consisting of 100R + 1nF
1) MUR860 in series with 1uH -- the latter representing transformer leakage inductance. YMMV
2) MUR860 in series with 1uH -- diode snubber consisting of 100R + 100pF
3) MUR860 in series with 1uH -- diode snubber consisting of 100R + 1nF
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An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Maybe this will make it a bit clearer -- the first chart is "standardized" -- the Reference Levels and Scaling Factors change a bit and I used the Log freq function.
the diode snubber lowers the impedance and smooths off the peak --
the diode snubber lowers the impedance and smooths off the peak --
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An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
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Yes, but you are still in the Mhz range. The goal of Carlos' snubber is to reduce the impedance in the khz. Calculating the snubber based on the ringing of the diode will reduce the ringing, but at the expense of raising the impedance of the power supply in the sub-1 Mhz region. Carlos' snubber will do absolutely nothing to the diode ringing, but it does lower the impedance from about 1 khz to 1 Mhz.
edit: made them all MEGA hertz, Andrew
edit: made them all MEGA hertz, Andrew
I don't think so. I think the goal was non-theoretical, more like esoterical 
Hi,
I would like to comment, even take back my intransigent stance, but I am having trouble interpreting the three styles of presentation in the graphs posted so far.
If one is showing 2db lower (just an example) what is that telling us?
Some show the resonant peak (posts 451 & 452) but all the later omit the peak. How can one compare when the reference is missing?
I would like to comment, even take back my intransigent stance, but I am having trouble interpreting the three styles of presentation in the graphs posted so far.
If one is showing 2db lower (just an example) what is that telling us?
Some show the resonant peak (posts 451 & 452) but all the later omit the peak. How can one compare when the reference is missing?
http://myweb.tiscali.co.uk/nuukspot/decdun/gainclonesnub.html
I'm setting up the regulated LM338 and want to clarify the schematic. In the diagram above, Carlos suggests using 1,000uf or 2200uf at the chip PSU's PINs. However,
However, in this thread,
http://www.diyaudio.com/forums/showthread.php?s=&threadid=35025&perpage=10&pagenumber=8
Carlos shared his experiment and said that he got the best result with 33uf instead of 1,000uf at the chip PSU's PINs.
Which one is up-to-date? or the schematic has not been updated yet? Thank a lot.
I'm setting up the regulated LM338 and want to clarify the schematic. In the diagram above, Carlos suggests using 1,000uf or 2200uf at the chip PSU's PINs. However,
However, in this thread,
http://www.diyaudio.com/forums/showthread.php?s=&threadid=35025&perpage=10&pagenumber=8
Carlos shared his experiment and said that he got the best result with 33uf instead of 1,000uf at the chip PSU's PINs.
Which one is up-to-date? or the schematic has not been updated yet? Thank a lot.
Mrpong said:
the Nat Semi guys have done a lot of work just on the bypsasing of these amps -- this is one of the ways in which they have tweaked the performance to levels which were previously unattainable for run-of-the-mill DIY amps. at the chip power pins 100nF + 10uF +1,000uF are recommended.
here are a couple more hints -- a 1uF or 470nF 100V or better polypropylene cap between Vcc and Vee makes the power supply a little happier, twist the power cables a couple of turns, dress the power cables at right angles to any signal path, don't use a ground plane DONT USE A GROUND PLANE !!!
you can snub away to your heart's content on the power supply board, but if you are using an EI core transformer instead of a toroid you might want to take a look at the charts that I made with the network analyzer and see whether a diode snubber is in order.
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