John Curl's Blowtorch preamplifier

[john curl]

Parasound used to make a preamp with a 990 clone (except for dual 170 fets instead of the transistor pair) and it worked pretty well. We don't make it anymore, because we have found better topologies since then.

 

[stinius]

Gerhard, I don't think that you understand the whole equation. First, it isn't just the wafer that needs to be tested, but each individual device. Only 1 device in 1000 will probably give nearly perfect results, almost entirely by random chance. This is my point. Once we OWN the fets, we can ONLY test them by hand. I am attempting to point out the absurdity of stating an IDEAL spec, when it is almost impossible to reach it.

Parasound used to make a preamp with a 990 clone (except for dual 170 fets instead of the transistor pair) and it worked pretty well. We don't make it anymore, because we have found better topologies since then.

John

Of course you are right and you know you are, but could you tell us some more about the new topology?

Cheers
Stinius

 

[john curl]

That's what I get paid for.

 

[stinius]

That's what I get paid for.

I know that and I didn’t expect an answer on the topology question.

Cheers
Stinius

 

[dave_gerecke]

But I would say that it's is nice to imagine we may catch John when he's tired and gives something up in a state of exhaustion induced delirium!

 

[syn08]

Gerhard, I don't think that you understand the whole equation. First, it isn't just the wafer that needs to be tested, but each individual device. Only 1 device in 1000 will probably give nearly perfect results, almost entirely by random chance. This is my point. Once we OWN the fets, we can ONLY test them by hand. I am attempting to point out the absurdity of stating an IDEAL spec, when it is almost impossible to reach it.

John,

Don't want to enter a debate here, but please leave this for those who are familiar with semiconductor testing. FETs can be sorted in whatever way you ask for on wafer, after encapsulation, after thermal/mechanical stress, etc... You only need a wallet fat enough to pay for good services and trust me, it won't be cheap. Anything custom in a semiconductor plant costs an arm and a leg, in particular if you are talking small quantities or extreme matchings of parameters that are technologically spread (like Idss in short channel JFETs). Ask Toshiba for 10,000,000 pcs. of a JFET pair with 0.1mA Idss matching, show them your wallet, and they may set up a process to build them.

BTW, you may buy a second hand TO92 handler and the TO92 test jigs, probably for about $20,000. Add an automatic test equipment of your choice (a dual low power bench power supply and a bench multimeter, both HPIB, will do for Idss), a second hand computer, pay a contractor to customize some software (not more than $5,000) and the hand matching is gone for good. The Vietnamese kid has only to pour the devices through kinda funnel and to collect the sorted devices from the output bins.

 

[stinius]

John,

Don't want to enter a debate here, but please leave this for those who are familiar with semiconductor testing. FETs can be sorted in whatever way you ask for on wafer, after encapsulation, after thermal/mechanical stress, etc... You only need a wallet fat enough to pay for good services and trust me, it won't be cheap. Anything custom in a semiconductor plant costs an arm and a leg, in particular if you are talking small quantities or extreme matchings of parameters that are technologically spread (like Idss in short channel JFETs). Ask Toshiba for 10,000,000 pcs. of a JFET pair with 0.1mA Idss matching, show them your wallet, and they may set up a process to build them.

BTW, you may buy a second hand TO92 handler and the TO92 test jigs, probably for about $20,000. Add an automatic test equipment of your choice (a dual low power bench power supply and a bench multimeter, both HPIB, will do for Idss), a second hand computer, pay a contractor to customize some software (not more than $5,000) and the hand matching is gone for good. The Vietnamese kid has only to pour the devices through kinda funnel and to collect the sorted devices from the output bins.

Ovidiu

Everything is possible with a big open wallet and when you are buying 10.000 pcs.

This is a DIY forum.

Cheers
Stinius

 

[john curl]

We, little people, usually have to test by hand. I know that there can be automatic testing, but noise is usually really hard to do quickly. Settling time, etc.

 

[HKC]

HKC --

Thanks for the pictures. I was just looking at that 1998 article today and saw your pictures on the Vendetta thread (I think.....).

One improvement you can make to the 317/337 regulators in that Positive Feedback article is to bootstrap the internal reference voltage of the 317 and 337 regulators with an LM329 "zener" as described in National Semi's application notes. It makes an audible difference, even when using the 317s or 337s as pre-regulators.

Phil

Hi Phil

Thank you for your comment. I will try to get some LM329 to apply to the regulators. If you have interests going forward, we can continue our discussion here:

http://www.diyaudio.com/forums/showthread.php?s=&threadid=10160&perpage=25&pagenumber=2

 

[syn08]

Everything is possible with a big open wallet and when you are buying 10.000 pcs.

This is a DIY forum.

10,000 pcs. is nothing.

JC is not a DIYer.

 

[john curl]

I appear to have more fets to measure than you do, but I don't have very large amounts. I have to rely on my 'trusty' Quantek noise analyzer, and it is slow.

 

[scott wurcer]

We, little people, usually have to test by hand. I know that there can be automatic testing, but noise is usually really hard to do quickly. Settling time, etc.

OK, so your testing 10Hz noise from a population known to have only 1000ppm yield and you want some measure of guarantee, how long do you observe each part? I promise you won't like the answer.

This stuff is a fantasy designed to create a mystique and folklore.

 

[john curl]

Pointless, but too long.

 

[john curl]

Again, so that my position on fet noise testing is understood:
I have tested thousands of fets over the last 40 years using a Quantek noise analyzer.
All Vendetta Research input fets have been hand selected by me, or a qualified technician. It is a relatively slow process, and may take at least 30 seconds to do right. The 10 Hz meter has to settle down to sort the differences.
When it comes to Syn08's low noise claims, I insist that it is virtually impossible to get the noise of .25nV/rt Hz over the audio range without super-sorting the fets and selecting only a small portion, perhaps 1 in 100 or 1 in 1000 in order to met HIS spec.
My spec is slightly looser, because it has been my experience that it needs to be so.
However, he has made a very low noise design, that is essentially patterned after the Vendetta Research input stage, AND the ONLY difference is source resistance values. If I reduced my source resistors, I would essentially get the same noise as Syno8.
Now, does everyone understand?

 

[scott wurcer]

What's the big deal? Refereed technical papers with .065nV noise have already been presented, if noise is all you want.

 

[john curl]

No big deal to you, you are 2.5 times noisier than even me. But are you 4 times noisier than Syn08? I just want to keep the comparison straight. I maintain that he is only 3 times quieter than your AD797. What do you think?

 

[Johnloudb]

Syn08, I was thinking ( a habit of mine ) and I was curious if you could parallel 2 of AD797 op amps to get more current, to better drive your tough load. Not sure if that would work. Maybe even get lower noise, by parallel hookup?

 

[Johnloudb]

Re: Hps 3.1

Nevermind, I see you already addressed the current limitation. I'm behind on this thread, hard to keep up with you guys.

But one could also double the value of R272 and R273 and use 2 AD797 op amps and output resistors ( R272 and R273) of each op amp connected in parallel to the 1 ohm resistors. Don't know that you'd gain any thing though.

To summarize:

Gain: 60dB @1KHz
RIAA: +/-0.1dB
Noise: 0.25nV/rtHz
Max input: 1.8mVeff
Headroom: 40dB (0.5mVeff) 29dB (1.8mVeff)
Distortions: <0.01% (TBD)

I have experimented this version by cannibalizing a HPS3.0 PCB (simply not installing the RIAA correction in the input stage plus a few adjustments, including a SMD adapter instead of the AD797) and everything seems to be fine (input stage wise). I guess all the current concerns are now addressed. I'll wait for your input before running another PCB batch.

[/B]

 

[lineup]

Syn08, I was thinking ( a habit of mine ) and I was curious if you could parallel 2 of AD797 op amps to get more current

Actuallu you can parallell lownoise opamps, like AD797
to get even lower noise in an input..

syn08 has paralleled 4x 2SK170/SJ74 transistors in input.
The same is perfectly possible with op-amp inputs.

 

[PMA]

sqrt(2) times less voltage noise, sqrt(2) times more current noise (for two opamps)