Justcallmedad said:
Thinking in it, the problem is just reported to the next casode!
Probably mental viscosity
I may be completely wrong, but I have the feeling that the major contribution to the total distortion is the non linearity of the input fets impedance, at least with a source of realistic internal impedance (1k or so). The only way I can think of (but I know very few things) to reduce this is to cascode these input fets (cascode, not folded cascode).
I should simulate that...
Please do consider this as a question, I have just been fooling sometime with simulations of the "curl follower" which is the heart of this input stage. I may have hit the sim versus reality barrier and I definitively have hit my present knowledge barrier.
Best regards
Philippe
It is easy to over-analyze this simple stage. Sometimes, you just have to test one and note the trade-offs. Most of the distortion should be from the change of Gm with current. The lower the output impedance, the more the current will change in the input differential pair for any given output voltage. This means more distortion with lower impedance, and why I stopped at 1K.
Nonlinear capacitance is real, but minimized in this example. This is because of the cascode, AND because there is significant voltage across the input fets. Now you know why I run them so hot, close to their limit. This is NOT how I design high production designs for Parasound, but I have never had a problem to this in limited production.
Nonlinear capacitance is real, but minimized in this example. This is because of the cascode, AND because there is significant voltage across the input fets. Now you know why I run them so hot, close to their limit. This is NOT how I design high production designs for Parasound, but I have never had a problem to this in limited production.
Meaningless simulations?
Dear,
You will find included the results of some simulations on the “curl follower”.
In the zipped file there is the schematic used, the results in tabular form, and 2 plots.
I have “measured” the total harmonic distortion of the circuit with +/- 20V psu (high!) and a 1V 10 Khz input. The input resistance was varied from 31.6 ohms to 10k ohms and the load resistance in the same range. The distortion was taken at the output and at the gates of the fets.
I also made the same simulations with +/-12V psu (only with the 10K ohms load).
And finally I tried the same thing with an “ideal cascode”, V4 and V5 being in that case set to 1V (same as input).
From the results you can obtain the first plot (load below 316 ohm not plotted because the distorting is so much higher).
We can see that with “high enough” impedance load, the output distortion goes up with the input impedance and that these curves track pretty well with the distortion that is already there at the gates.
Lowering the power supply increases the slope of this dependency.
The “ideal cascode” is totally free from this effect. The value of the distortion, with the 10k load, is in the range of the distortion of the simulated generator.
Do these simulations have anything to do with the real word? Am’ I just reverse engineering the simulator? I have no tool to make real measurements.
What is the highest value you can reasonably use for the psu with those fets? 20V seems to me rather high as the specs say 24V max.
Please note that with an input attenuator of 25K you will have an input resistance between 0 and 12.5K, this justify the values used. The folded cascode does maintain a constant tension to the drains which is not constant VDS as in the “ideal cascode”.
Now, with a circuit having some gain, the input voltage is reduced for the same output voltage, which may place the distortion appearing at the gates as a second order factor.
Humm, I should simulate that also … but only if the simulation results have something to do with the real world ;-)
Best regards
Philippe (whose has many more questions, but that will be for another day)
PS it is also fun to plot the output distortion as a function of Rout (log log scale).
PS2 I hope this is no thread hijack
Dear,
You will find included the results of some simulations on the “curl follower”.
In the zipped file there is the schematic used, the results in tabular form, and 2 plots.
I have “measured” the total harmonic distortion of the circuit with +/- 20V psu (high!) and a 1V 10 Khz input. The input resistance was varied from 31.6 ohms to 10k ohms and the load resistance in the same range. The distortion was taken at the output and at the gates of the fets.
I also made the same simulations with +/-12V psu (only with the 10K ohms load).
And finally I tried the same thing with an “ideal cascode”, V4 and V5 being in that case set to 1V (same as input).
From the results you can obtain the first plot (load below 316 ohm not plotted because the distorting is so much higher).
We can see that with “high enough” impedance load, the output distortion goes up with the input impedance and that these curves track pretty well with the distortion that is already there at the gates.
Lowering the power supply increases the slope of this dependency.
The “ideal cascode” is totally free from this effect. The value of the distortion, with the 10k load, is in the range of the distortion of the simulated generator.
Do these simulations have anything to do with the real word? Am’ I just reverse engineering the simulator? I have no tool to make real measurements.
What is the highest value you can reasonably use for the psu with those fets? 20V seems to me rather high as the specs say 24V max.
Please note that with an input attenuator of 25K you will have an input resistance between 0 and 12.5K, this justify the values used. The folded cascode does maintain a constant tension to the drains which is not constant VDS as in the “ideal cascode”.
Now, with a circuit having some gain, the input voltage is reduced for the same output voltage, which may place the distortion appearing at the gates as a second order factor.
Humm, I should simulate that also … but only if the simulation results have something to do with the real world ;-)
Best regards
Philippe (whose has many more questions, but that will be for another day)
PS it is also fun to plot the output distortion as a function of Rout (log log scale).
PS2 I hope this is no thread hijack
plep said:
Hi Phillipe,
I -have- measured these circuits with a real live Audio Precision
with various supplies, drive Z's and quiescent currents.
If you like I can dig up my results and see how well the sim fared.
Generally speaking the sim is always optimistic and doesn't do
the more subtle parameter changes well.
I am very busy right now but will try and get back later.
Cheers,
Terry
Dear Terry,
Many thanks!
The results from the sims are just “too good to be true”. I’ll really enjoy seeing if we can observe the same behaviour in the “real” data or if there are other phenomenon overlooked that mask them. The figures are so low that they should be meaningless, except for extreme conditions.
No hurry needed, time is scarce.
Best Regards.
Philippe
Many thanks!
The results from the sims are just “too good to be true”. I’ll really enjoy seeing if we can observe the same behaviour in the “real” data or if there are other phenomenon overlooked that mask them. The figures are so low that they should be meaningless, except for extreme conditions.
No hurry needed, time is scarce.
Best Regards.
Philippe
It is somewhat better to actually measure a pair of devices, but they would measure fairly well anyway. It is more important to understand the type and order of the distortion that is generated and whether it would be audible in any case. Many times, people worry about very small numbers, but that is not what makes the difference in sound quality. A small amount of lower order 2nd or 3rd harmonic distortion is very difficult to hear.
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