Hi Bob
I agree with you although I find the baxandall pair one of those circuits which just legitimately will not work correctly in a simulator, another to a large extent being triple output stages. When one tries sims of any of the yamaha amps using both these problematic circuits it doesnt look pretty at all but in real life work perfectly without any problems. In the SSA thread I showed a version of a design of mine with baxandall pairs, it doesnt show any severe problems but shows some peaking, in real world circuit this is not the case.
Edmond, does your design show any signs of peaking ??
I agree with you although I find the baxandall pair one of those circuits which just legitimately will not work correctly in a simulator, another to a large extent being triple output stages. When one tries sims of any of the yamaha amps using both these problematic circuits it doesnt look pretty at all but in real life work perfectly without any problems. In the SSA thread I showed a version of a design of mine with baxandall pairs, it doesnt show any severe problems but shows some peaking, in real world circuit this is not the case.
Edmond, does your design show any signs of peaking ??
Hi Mike,
Indeed. Basically, the same concept: IPS->cacode->CM->cascode and compensated by means of MIC, err, sorry, I mean phase lead compensation.
But THD20k (of the front end, thus not the whole amp) is orders of magnitude higher, most likely due to the ordinary cascode (instead of a Baxandall/Dimitri cascode).
Cheers,
E.
More questions. Number 1 and 2.
Edmond's excellent website inspires many more questions to help understand better!
1. To allow a fairer "apples to apples" comparison cannot the Input Inclusive Compensation be applied to the conventional circuit too?
It seems this would reduce the load on the IPS just as in the SuperTIS, and eliminate the duplicate Miller loop paths, also as in the SuperTIS
Or is there some reason why it is so effective on Edmond's circuit but problematic on the conventional one?
2. To compensate the main compensation loop of IIC, Bob Cordell notes (p177) that it may be possible to have nested Miller compensation on the (so called) VAS. This is attractive in theory, since it should provide similar benefits as ordinary Miller compensation over shunt compensation. However in his own benchmark amp he does not use this method or the PLIL across the inputs of the SuperTIS, but a series RC across the LTP collectors. Any comments on the 3 choices?
One final minor correction for the website. For Fig. 3 the subtext "between C9 and R24" should be "between C9 and R25"
Best wishes
David
Edmond's excellent website inspires many more questions to help understand better!
1. To allow a fairer "apples to apples" comparison cannot the Input Inclusive Compensation be applied to the conventional circuit too?
It seems this would reduce the load on the IPS just as in the SuperTIS, and eliminate the duplicate Miller loop paths, also as in the SuperTIS
Or is there some reason why it is so effective on Edmond's circuit but problematic on the conventional one?
2. To compensate the main compensation loop of IIC, Bob Cordell notes (p177) that it may be possible to have nested Miller compensation on the (so called) VAS. This is attractive in theory, since it should provide similar benefits as ordinary Miller compensation over shunt compensation. However in his own benchmark amp he does not use this method or the PLIL across the inputs of the SuperTIS, but a series RC across the LTP collectors. Any comments on the 3 choices?
One final minor correction for the website. For Fig. 3 the subtext "between C9 and R24" should be "between C9 and R25"
Best wishes
David
Nothing to do with miller, as the later's compensation has got to be applied about a loop with a single inverting stage for pole splitting to occur. All other schemes are either variations of input phase lag compensation or phase lead compensation, unless nested miller compensation schemes, which must also have a single inverter in the loop, are used.
Mike, apparently you have never heard of a Miller Integrator. The loop formed by the capacitor can enclose anything from a transistor to an op amp. Your "definition" of Miller compensation is narrow and myopic. You also do not realize that pole splitting does indeed occur with Miller compensation that happens to enclose more "stages" than your narrow definition allows, like Miller Input Compensation.
Bob
Hi Bob
At the time you wrote this I replied that I looked forward to an expanded second edition. Now I think I want a whole new book - "ADVANCED Audio Power Amplifiers"! With a quantative analysis and comparison of all this multi-loop feedback stuff so I don't have to work it out for myself! I can't find much information on the subject. All the references I have found so far are unavailable to read in the local libraries and dammed expensive to buy just on speculation. Do you (or other DIYers) have any recommendations on the subject?
And no comment on my earlier questions about your use of MIC aka IIC in your JAES amplifier?
Best wishes for the new book.
David
Hi Dave,
This is good feedback for me when I do the Second Edition of the book. I am indeed trying to collect in one place all such suggestions and errors that have been pointed out. There is so much I have learned here from the feedback of everyone on the forum, and I am very grateful for it. Often even I will go back into my book to look something up and see that I could have explained it better or expanded upon it. The Second Edition is still aways off, though.
I must have somehow missed the comments you were referring to about MIC aka IIC in my JAES paper on the MOSFET power amplifier with error correction. I looked back aways and could not find them. If you'd like to raise those questions again I'll be glad to try to answer them. As you probably know, I've become a pretty big fan of Edmond's TMC compensation.
When I was writing the book I also suffered from trying to find out all sorts of things about a given subject, spread out in many different places. The information on Class D amplifiers was particularly fractured and spread out. I know exactly what you mean, but am not sure I have any good suggestions.
Cheers,
Bob
I meant in my post #147. It wasn't just directed to Edmond. I use both your terms (MIC, VAS) and Edmond's (IIC, TIS) to include everyone!
As to question 2, I have had a little more time to think and express it more fully. The inner, nested compensation of the MIC loop in your JAES amp is a series RC across the LTP ie. shunt compensation at the IPS output. Edmond uses a series RC shunt across the IPS input. Since Miller compensation of the VAS is considered superior to shunt compensation in simple, non-nested schemes then it seems attractive for the inner loop of a nested (input inclusive) scheme too. Your comments on p.177 imply the idea, I think.
I now realize that with a complementary, double VAS this will potentially reintroduce the same VAS versus VAS issues that the IIC scheme was devised to avoid in the first place. But it seems that since the inner loop is much "lighter" (as you say) that it should be less of a problem. Need to sim. this but am interested in your ideas.
Best wishes
David
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But that is exactly what i said when i stated that miller compensation occurs in a nested arrangement with more than one stage provided just one of those stages is an inverter.
If the later is absent then pole splitting cannot occur and the compensation cannot be described as miller compensation.
Surely this is obvious to you?
If this is 'MIC', then it can in no way be described as miller compensation as pole splitting cannot occur with this arrangement.
Folks are incouraged to read Operational Amplifiers: Theory and Practice by james Roberge
to obtain a clear understanding of compensation.
First things first
Hi Mir & David,
Regarding post 110 & 147, I know I still owe you an answer. But please have a little patience with me, as I'm still busy with updating my website*. First things first.
Besides, the more I explain 'over-there', the less I have to explain 'here'.
Cheers,
E.
* It takes more than the usual time because English is not my native language.
For the same reason, anyone is invited to correct my 'Dunglish' (and/or typos).
Hi Mir & David,
Regarding post 110 & 147, I know I still owe you an answer. But please have a little patience with me, as I'm still busy with updating my website*. First things first.
Besides, the more I explain 'over-there', the less I have to explain 'here'.
Cheers,
E.
* It takes more than the usual time because English is not my native language.
For the same reason, anyone is invited to correct my 'Dunglish' (and/or typos).
I appreciate the excellent work you do. Any help is a pure bonus and it would be very rude to complain! In any case, the extra time helped me to clarify my ideas, as noted in post #154 to Bob Cordell.
And you write so well that I even wondered if you were a british expatriate, especially with a name that sounds so. British ancestors?
Best Wishes
David
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Thank you for the book reference. I will try to find it tomorrow.
In the mean time it seems that as far as the outer loop is concerned there IS only one inversion, in the VAS. The IPS does not invert with respect to where the VAS output is connected. That would allow effective capacitance multiplication and that's the essential of Miller effect.
Or so I think. If not then I hope to learn more and if I am correct I have perhaps saved Bob Cordell a post!
Best Wishes
David
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