First Watt F7 review

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I believe insulation is integral in part from factory , at least I've seen them like that

as I understand position - it hangs on air in case , not heatsink

I have two idiot Cats , liking to lay on Papa's Koan M2 even in mid of Summer ....... so, while sinks are hot , innards can become scorching hot
 
Yes of course.
I had the same idea 9 years ago for the exact same reason (but without positive feedback).
I prefer simple circuits (I also prefer low gain amps for my efficient speakers), lateral mosfets allow that. They also tend to give lower distortion per Siemen of transconductance. The only reason to want more is for the damping factor, I achieved it through paralleling a pair of devices with an appropriate amount of feedback.
Nelson is brainier so he did it with positive feedback.

Edit: One other thing that can be said for the laterals (at least mine), is they match extremely well, so for the DIYer they may even work out to be cheaper than IRFP240/9240
 
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I have updated my schematic of post #218 using information gained from the 6Moons photos and everything simulates fairly well.

I estimate the open-loop gain of the jfet and output fet stages into an 8 Ohm load to be 42dB with all feedback removed. This was measured as the V(Out+,Out-)/V(gates,fbnode), where gates is the jget gate node, and fbnode is the wiper of potentiometer P3. With a closed-loop gain of 14dB that means that there is 28dB of negative feedback, which is a huge feedback factor. Perhaps I am incorrectly estimating the open-loop gain, but that gain factor is fairly consistent with the F5.
 

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Ihquam

I guess than P3 serve for output AC balance adjustment ?

and additional question , if let`s say we supply that F7(#317) with +/- 24VDC ,and with OPS - Iq = 1A , what is the approximate values for P1 & P2 than ?

Edit , I think that now you are very close to original F7
 
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Ihquam

I guess than P3 serve for output AC balance adjustment ?

and additional question , if let`s say we supply that F7(#317) with +/- 24VDC ,and with OPS - Iq = 1A , what is the approximate values for P1 & P2 than ?

Edit , I think that now you are very close to original F7

That will depend on the Idss of the jfets, the jfet idle current with degeneration, and the output fet Vgs at 1A. It is a pretty easy calculation:

Rdrain_load = Vgs_1A/Ijfet