ESS Sabre Reference DAC (8-channel)

Hey guys, they will be available again soon. Brian and I are working on some tweaks based on info from Dustin. We want to make sure we have parts totally sorted out out before we get up a full head of steam.

We also have a lot of other projects going on at the same time. too much to do, too little time. :)

Very sorry for the delay. Right now we could sell more than we can make, so we really can't do pre-orders. We are working on a solution to that "problem".

Cheers!
Russ
 
We appreciate your efforts (both of you). Will the tweaks you mention amount to much? I would consider selling my module if there may be any gain in SQ for the next version, however small.

khundude:

Thanks for the compliments :) Give me a day or two and I'll email you a parts list with where I purchased each part from. I've been looking over the parts I used in the amp the past couple days as I await a second board to clodge together a balanced amp, and I don't really see anything I'd change.

I do plan to use an IVY, though it will be a week or two before I pick one up.
 
The PIC powers on and waits 5 seconds for the demo board controller to configure the Sabre8 on the board. The the PIC tests the I2C bus to see if it's idle, then sends a restart to the bus if it is.

Then it sets the registers up the way I want them and goes into low power sleep mode. The I2C bus is the blue wires on pins 11 and 13.

I put in a big green button on the back.

http://home.columbus.rr.com/rossl/images/mod/Sabre_back_button.jpg

An externally hosted image should be here but it was not working when we last tested it.
 
Every time this button is pushed, the PIC wakes from sleep and increments the count once in the DPLL register. IF the register gets to 111,
(B'10011101' in register 11) it goes back to 001. (B'10000101' in register 11) That way I can continue to cycle through 7 DPLL settings.

Then it saves the value to EEPROM and goes back to sleep.

The Orange wire on pin 2 of the PIC watches the UNLOCK output on the Wolfson WM8804. If we unlock, it wakes the PIC from sleep, mutes the Sabre, and goes back to sleep. When the Wolfson locks again, PIC wakes up, keeps the Sabre in mute for about 400 mS, then unmutes the DAC.

That prevents some pops and clicks that the Wolfson makes when it is trying to lock on. When the DVD player changes sampling rates, the Wolfson sometimes flashes the lock LED and makes some clicks. This code waits until it is really locked before the volume comes back on.

The PIC code is written to control a 4 port input switch using a second input button to change the channel. I don't have that hardware implemented in this test platform, I am running out of room in this little box and need to work on my PCB layout where all this stuff is integrated.

http://home.columbus.rr.com/rossl/images/mod/Sabre8_cpu_close.jpg

An externally hosted image should be here but it was not working when we last tested it.


The first 3 leds show the DPLL setting. The second LED being on means DPLL is now two, 010 (B'10001001' in register 11)

The fourth led is an error led if there is a problem with I2C. It hasn't come on since I got the timings worked out.

All code written in PIC assembly language.

The code is also written to monitor the de-emphasis flag in the SPDIF receiver, but I don't have that implemented in this platform either because the little Wolfson board is running in hardware mode right now.
 
fierce_freak said:
We appreciate your efforts (both of you). Will the tweaks you mention amount to much? I would consider selling my module if there may be any gain in SQ for the next version, however small.

There won't be any major changes that I know of, just minor value changes. :)

There is one IVY board tweak we are considering, but it easy enough to rig the change even with current boards.

Cheers!
Russ
 
Fierce freak:


You're making me envious!!! but yes the 24 aikido HPA contrinues to be as good as ever. Sounds great with both HD650s and k701s. Glad to hear you're enjoying it. Have you thought any more about going balanced?


Russ: Not hurrying you, just wanted to know so I didn't miss out! What values of toroidals are you recommending for the buffalo and IVY?


Fran
 
I can't see myself going balanced - really nothing I have is balanced bar the CDP and those who know say there isn't much difference between the SE and bal outputs on it. Be nice to try it sometime alright though.

However, there seems to be a real buzz around this chip and I would like to try it out. And the currency is playing in my favour right now. $300 is now only €185 which makes it more affordable.

Russ: would the dac, ivy and power supplies fit in a 1U rack mount box?



Fran
 
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rossl said:
Every time this button is pushed, the PIC wakes from sleep and increments the count once in the DPLL register. IF the register gets to 111,
(B'10011101' in register 11) it goes back to 001. (B'10000101' in register 11) That way I can continue to cycle through 7 DPLL settings.

Then it saves the value to EEPROM and goes back to sleep.

The Orange wire on pin 2 of the PIC watches the UNLOCK output on the Wolfson WM8804. If we unlock, it wakes the PIC from sleep, mutes the Sabre, and goes back to sleep. When the Wolfson locks again, PIC wakes up, keeps the Sabre in mute for about 400 mS, then unmutes the DAC.

That prevents some pops and clicks that the Wolfson makes when it is trying to lock on. When the DVD player changes sampling rates, the Wolfson sometimes flashes the lock LED and makes some clicks. This code waits until it is really locked before the volume comes back on.

The PIC code is written to control a 4 port input switch using a second input button to change the channel. I don't have that hardware implemented in this test platform, I am running out of room in this little box and need to work on my PCB layout where all this stuff is integrated.

http://home.columbus.rr.com/rossl/images/mod/Sabre8_cpu_close.jpg

An externally hosted image should be here but it was not working when we last tested it.


The first 3 leds show the DPLL setting. The second LED being on means DPLL is now two, 010 (B'10001001' in register 11)

The fourth led is an error led if there is a problem with I2C. It hasn't come on since I got the timings worked out.

All code written in PIC assembly language.

The code is also written to monitor the de-emphasis flag in the SPDIF receiver, but I don't have that implemented in this platform either because the little Wolfson board is running in hardware mode right now.

Willing to share some details? This sounds like it would also work with the cod modules I am using and avoid the clicks and pops (or worse) that occur when the WM8804 unlocks due to loss of signal or a sample rate change.
 
Quantizer settings.

Hey guys, I have been trying the different quantizer/notch/differential mode settings.

I have to say that while 6bit quantizer may measure slightly better for DNR, but I have really liked the sound of the 8 and 9 bit quantizer settings in pseudo differential mode. In both these modes the notch delay is set to off.

In 6bit mode the notch has been tested in both the n/64 mode and off.

What have you guys been finding?

The Quantization noise should be lowest in the 9 bit mode, and so should require the least external filtering (I think).

Cheers!
Russ
 
Hi kevinkr,

I'm not familiar with the cod module. What I am doing is very similar to a debounce circuit. It's not complicated.

The UNLOCK signal from the WM8804 starts a timer loop when it goes low... If the signal bounces and goes back high before the time runs out, an interrupt happens and the DAC does not get out of mute. When it goes low again and stays there until the timer completes, then we turn up the volume by setting the Sabre register. The LSB of register 10.

I am still adjusting the time, right now it is 400 mS. I have tried 600 mS. I want it to be as short as possible while still eliminating the clicks. I will be doing some serious testing over the weekend.

Also in register 10 of the Sabre is the De-Emphasis setting. Every time that I unmute, I check the DE-EMP input pin to see if I should unmute with or without de-emphasis. Since I don't have de-emp implemented in hardware yet and all I have is a pullup on the PIC pin that I have reserved for de-emp, it always comes up without de-emp right now. But, as soon as I connect up a SPDIF receiver chip that detects the DE-EMP flag, it will start working. So, that is pretty simple to implement.

The De-emp pin is on IOC pin on my PIC. (Interrupt-On-Change) Every time the de-emp flag changes, the PIC will wake up and mute, then unmute in the correct de-emp state.

So, that is about the extent of my usage of the Sabre's register 10.
 
Re: Quantizer settings.

Russ White said:
Hey guys, I have been trying the different quantizer/notch/differential mode settings.

I have to say that while 6bit quantizer may measure slightly better for DNR, but I have really liked the sound of the 8 and 9 bit quantizer settings in pseudo differential mode. In both these modes the notch delay is set to off.

In 6bit mode the notch has been tested in both
the n/64 mode and off.

What have you guys been finding?

The Quantization noise should be lowest in the 9 bit mode, and so should require the least external filtering (I think).

Cheers!
Russ


Hi Russ,

I haven't played with those settings in about two months. Even then, I didn't give them a proper listen test. I will play with those over the weekend too.

Thanks for the tip.

:D

don't feel bad, Ed,
99.99999% of the population has no idea what we are talking about here

:D
 
Hi everybody,
No my project did not die ;) I'm working on it.

It goes waaaaaaay slower than expected as I have tons of work in the recording studio. Need to sleep :( .

I have a question for Dustin, or Russ White:

What will the DAC prefer:
- Same AVCC and AVDD for left and right, with proper decoupling on each side?
- A regulator for each side, but these may then not be exactly matched?


Additional question: may I use MKP 100nF for decoupling instead of X7R? These have a way higher ESR but are not piezo - and as my DAC will mainly have to be used on stage, I really fear using these type of caps.

Thank you! :)



News about my work:
- DAC board on 4 layers (in fact, I could get it cheap)
- Supply regulators on a board that plugs on the DAC board (layout will be done tomorrow if I have the answers to the questions I ask in this post).
- I/V board (IVY like, in fact). 8ch, 2ch, I'm personnaly targetting one that could be switched between the two modes - but I'll provide simpler boards for you as you probably don't need it.
Just a question: 2 Super Regulators to power all opamps with decoupling, or simpler ldo on each? A controversial question - Noone semms to agree...
- Digital inputs board: Spdif coax&optical & AES/EBU + buffers to drive all the i2s over longer wires. Probably on something like sub-d 15 + i2c connection.
-Uh, no microcontroller right now but I may end up with one.

Another challenge is to make it suitable for easily switching caps (as power supplies are on another board). So anybody could try some stuff to get the best of this chip - and so will I, too!

Way too tired - going to sleep now.
See you ;)
 
Re: Quantizer settings.

Russ White said:
Hey guys, I have been trying the different quantizer/notch/differential mode settings.

I have to say that while 6bit quantizer may measure slightly better for DNR, but I have really liked the sound of the 8 and 9 bit quantizer settings in pseudo differential mode. In both these modes the notch delay is set to off.

In 6bit mode the notch has been tested in both the n/64 mode and off.

What have you guys been finding?

The Quantization noise should be lowest in the 9 bit mode, and so should require the least external filtering (I think).

Cheers!
Russ

I vaguely remember Dustin talking about this somewhere, but cannot find the place. Does anyone have a link? Failing that, what registers need setting to what?

Dustin, I'm taking a guess that more bits = lower out of band noise?

Thanks.
 
Re: Re: Quantizer settings.

Spartacus said:


I vaguely remember Dustin talking about this somewhere, but cannot find the place. Does anyone have a link? Failing that, what registers need setting to what?

Dustin, I'm taking a guess that more bits = lower out of band noise?

Thanks.

Dustin wrote a long explanation of the register settings back in post #35 of this thread.
http://www.diyaudio.com/forums/showthread.php?postid=1429418#post1429418


I just programmed a PIC '677 that sets register 14 to 0x03 and sets register 15 to 0xFF on my test box.

I'm listening to it now.

I will have to listen for several hours before I decide if I like the sound better than the previous setting, which was register 14 to 0x0B and register 15 to 0x00.

Lower out-of-band noise would be good for me because I'm using minimal filtering in the analog domain. :D