Fuse in ouptut can save nothing (it is too slow), only decreasing DF and increasing THD at low frequencies (thermal modulation of fuse resistance).
Now it is time to makae some antisaturatin modifications for fast recovery (try to inspect limitation at 120kHZ and look for "rail "sticking" !) and overcurent protection.
Now it is time to makae some antisaturatin modifications for fast recovery (try to inspect limitation at 120kHZ and look for "rail "sticking" !) and overcurent protection.
No, you generally want just plain resistors - any inductance in in series with the transistor input capacitance is just asking for trouble.
As a matter of fact the 100uF capacitor actually provides a dominant pole frequency (shunt) compensation of the Vbe multiplier at a very low frequency, positively eliminating any chance of local oscillation. And a single transistor Vbe multiplier does not have a particularly high amount of local negative feedback or a very low dynamic impedance.
No, you won't. The resistors in conjunction with the large value electrolytic bypass caps are mandatory for low-pass filtering the HF junk on the power rails from the input stage and VAS circuitry due to the diminishing HF PSR. You can look up a complete discussion of this in the handbook.
Yawn. With a basic double EF you will only get a local instability here with that 2.2uF cap in place if the layout is particularly bad or if you do something silly such as leaving out some adequately sized base stopper resistors for the driver transistors.
The 2.2uF is actually there to speed up switching of the power output transistors. Again, you can look up a complete discussion on this in the handbook (one of the distortion mechanisms).
This makes no sense whatsoever. While the 2.2 ohms is rather pointless, the ratio of the resistances is irrelevant. The VAS is actually operating as an intergrator due to the local negative feedback provided by Cdom and any influence of that 2.2 ohms on the "bandwidth" of the VAS is non existant.
The 2.2 ohms would be better removed* as it does nothing usefull and the 100R biasing resistor for the VAS buffer emitter follower should be increased to 1k - there is no linearity benefit to be had running the EF for the VAS so hot.
*although some form of clipping current limiting needs to be implemented for the VAS EF - I'd fix its collector voltage to 10V above the negative rail with a zener biased with a resistor to ground.
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Why? Do you have a valid technical reason here, or can we just say it's so?
From (vague) memory (in the section of the handbook discussing the (zip) merit of alternatively loading the EF with a current source) it was stated the there was no measurabe benefit from using a resistor here any lower than 1.5k or so.
With a modern, high fT, low Cob transistor for the VAS it would be even less of an issue.
Inductance in parallel with resistance and in series with input capacitance won't resonate when tuned properly and will change the reactive input impedance of the bases back into resistive.The purpose of the inductance is to bypass the resistor at low frequencies.
The 100uF capacitor does have some inductance... And there is a second pole from Vbe multiplier transistor roll-off added to the pole from the capacitor. I know local Vbe multiplier instability because it happened to me. A zero was required at the oscillation frequency (by adding some series resistance) for stability.
The diodes do an interesting filtering work because the capacitors in the other side only get charged when short term output power is low and power supply recovers from sag. Then, input stage supply rails get completely disconnected when output power is high and power supply sags again. This allows for lower THD near the rails, and if an oscillation problem due to cross-talk was present, the diodes would prevent sustained oscillation.
Again, the 2.2uF capacitor has some series inductance, and the transistors also exhibit some series inductance. For example, 2.2uF with 40nH resonates at 530Khz... The worst capacitor that can be placed there is a film or ceramic. A small electrolytic is ok due to the higher ESR. This problem is something that I have experienced.
Local feedback has precedence over global feedback. A composite VAS can easily oscillate if proper degeneration is not employed. With a simple miller capacitor phase margin is very small because each transistor is producing nearly 90 deg lag at RF, but proper degeneration improves phase margin.
Theoretically, a transistor with a beta of 100 and Ft of 100Mhz should start to roll off at 1Mhz at -6dB/oct (adding 90 deg. of phase shift). Close a miller feedback loop around two of these and they won't hesitate to oscillate, maybe not always but easily near clipping, and transient response will show ringing. If degeneration is employed to force a gain of 10 in one transistor, it will not roll off until 10Mhz. Then it can be used inside a composite Vas if the outer loop is below 0dB gain at 10Mhz.
And sorry, I'm not quoting books, I'm talking about problems that I experienced in the past (that is, before class AB became boring for me).
i was thinking like you...until i simulated around this with
simple circuits about the dc operating points..
the simulator is accurate enough for static measurements..
in the original d. self amp, the following must be made :
vas buffer resistance should be about 270R and the VAS must have
a degeneration resistance of 43R...
output dc offset will then deacrese to normal value for
an op amp topology like this, i.e, from 1.475 mV to +-50 uV...
perhaps it s a device dependency..
This isn't an RF amplifier. The input capacitance is highy variable with operating conditions; so much for "tuning" and there really isn't anyting to be gained by shunting the base stoppers for low frequencies. If you have actually built an amplifier and can demonstrate the opposite to be the case than please feel free to share.
The pole added by the capacitor is several orders of magnitude removed (lower) from that "from Vbe multiplier transistor roll-off". I've personally built dozens of amplifiers (yeah, I know you think that you are the only one), almost always with big electrolytics across the Vbe multiplier and I have never had a problem with oscillation once. As a matter of fact there have been 10's of thousands of commerical "Blameless" amps builts this way too, with claims of no inherent bugs, and reliable repeatability.
You must have done something rather amazing if you actually managed to make yours oscillate.
Yeah, I know what the diodes are supposed to do. If you wan't to add them, you put them in series with the resistors, not instead of. And again, the resistor are there to form a low pass filter with the bypass capacitors (look up the measured results and analysis given in the handbook - no point repeating it here).
As for the rail sag issue, that's pretty much a furphy for a domestic hifi amplifier anyway as the average signal level is very low and you will only get significant rail sag if the supply filtering is woefully inadequate. Have you actually ever stuck a cro probe on a properly built power amplifier's supply rails while listening to tunes?
That parallel L/C inside the capacitor is well and truely damped here due to the rather low impedance between the driver transistor emitters such that any such HF resonance will be of little consequence.
If you experienced oscillation here with the capacitor in place then it was probably due to parasitic oscillation of the driver transistors caused by the added capacitive load between the driver transistor emitters. Transistors connected as emitter followers can oscillate if presented with a capacitive load (input impedance gets a negative impedance charachteristic).
I have experienced oscillation here myself with when the capacitor is added, and as I have stated already there is simple a reliable cure - base stopper resistors for the driver transistors. This has been a perfectly reliable precaution in the several such amplifier that I have built.
From my experience it has been virtually impossible to make the simple "composite" VAS of the "Blameless" oscillate, be it with a high speed CRT driver transistor or a MJE340 or a BD139 or half a freaking 12AT7, degenerated or not. You evidently don't really inderstand how this intergrator stage works - how the hell do you "force a gain of 10 in one transistor" here with emitter degeneration? For a start, the VAF buffer operates at a (votage) gain of slightly less than unity as it's just an EF and the VAS "gain" is entirely frequency dependant as it is an intergrator.
The only time I have found degeneration necessary to avoid a tendancy to oscillation is when VAS is not only buffered but cascoded as well.
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There nearly isn't a single component in a fully directly coupled amplifier that will not ultimately effect the input offset voltage to some degree when "tweaked" - the significance is another question.
Well dear friends, a lot of things to read...lovely picture GV is using.
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A friend send me this link, almost 5 thousand schematics, 385 Megabytes of electronics for you.
enjoy while i will be reading all these posts.... pdf in german language:
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Use the link or type this adress, wait the seconds they ask you to wait and them the download will start....i did it, so, it works!
regards,
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I have a GIFT FOR THE DX CREW!
A friend send me this link, almost 5 thousand schematics, 385 Megabytes of electronics for you.
enjoy while i will be reading all these posts.... pdf in german language:
GigaSize.com: Host and Share your Files
Use the link or type this adress, wait the seconds they ask you to wait and them the download will start....i did it, so, it works!
regards,
Carlos
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