Comments on PCM1794A DAC design

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Take a look by all means, but don't try that at home:D. This is quite a good example of how not to do a DAC output stage - in particular the decoupling. Are all those thick (power) traces ground fills?
Board looks different, schematic is just that - schematic...
 

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Are you really sure sensitive analog circuits are going to be better off with multiple built-in 2MHz oscillators? Especially as each reg has its own and they won't be synchronised.

Sure? Never :) But I'm trusting Pierre on this. If he says it's good, it's good enough for me. And the specs do look nice.

I'll start off with two DAC boards, with and without SRC, and shuffle things around a bit to be able to experiment with Iref resistors and PSU resistors and caps. They'll still be separate boards so I can test both zapfilter and LM4562 output stage.

If I keep the PSU resistors for each rail, how do I decide on the values? DIR draws 2x 8.3 mA, SRC draws 2 + 66 mA. DAC Idd draws 23-45 mA depending on sampling frequency and ~35 mA Icc. There's no separate power data for the three Vcc rails.
 
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But what's IC406-2 and all the transistors for?

IC406-2 looks to be a switchable gain stage (0dB, 6dB) but I can't think why its needed. The transistors on the output side (TR402/3) are for pop/click suppression on power up/down or output muting (which is the same thing). Notice they're the 'wrong' way around - I dimly recall that a transistor connected in such a way has a lower saturation voltage.
 
Hi Guys...
I'm just keeping an eye on this thread... my design includes some complicators... I decided to regulate each voltage rail separately.. +5Va, +3V3 digital, +5VaR, +5VaL... using LT1763-xV, and analog outs are via OPamp.. LME49722 (4562 version2)...

I was thinking about hires sources of signal: maybe SRC is just a jitter reclocker than anything... is not 24/48K enough? If so, I would get SRC out and put a PMD100 in the circuit, the clock is supplied like "the Flea" and is near.

just thoughts... not to disturb your thread. :)

About Denon: yes, 2930 and family has HDCD... that output is for gain purpose of HDCD lower out. Mine is a little different as 2930 uses PCM1791.
But the DAC project is intended to be used with SD card player.


Regards.

Hisatugo.
 
IC406-2 looks to be a switchable gain stage (0dB, 6dB) but I can't think why its needed. The transistors on the output side (TR402/3) are for pop/click suppression on power up/down or output muting (which is the same thing). Notice they're the 'wrong' way around - I dimly recall that a transistor connected in such a way has a lower saturation voltage.

M'kay. Just wanted to make sure I didn't have to mess with it.

Yes they do - how clever of them to limit the specified noise bandwidth to 100kHz when that little charge pump runs at 2MHz:p

Sulplise, sulplise ;)

Hi Guys...
I'm just keeping an eye on this thread... my design includes some complicators... I decided to regulate each voltage rail separately.. +5Va, +3V3 digital, +5VaR, +5VaL... using LT1763-xV, and analog outs are via OPamp.. LME49722 (4562 version2)...

I was considering the same, but decided it was too overkill, even for me... With ten channels, that's 20 more regulators.

I was thinking about hires sources of signal: maybe SRC is just a jitter reclocker than anything... is not 24/48K enough? If so, I would get SRC out and put a PMD100 in the circuit, the clock is supplied like "the Flea" and is near.

I'll want to try 192 kHz upsampling with the SRC, but its main function is reclocking. But as stated earlier, I'm suspecting (and hoping) the Lynx AES16 source clock is clean enough to skip the whole SRC.

just thoughts... not to disturb your thread. :)

This kind of "disturbance" is exactly what makes diyAudio forums great ;)
 
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Ok, I'm having a little difficulty understanding the Denon circuit... I can see that the first six opamps are the regular I/V and summing circuits, and IC406-1 single ends it all. But what's IC406-2 and all the transistors for?

Does this player support HDCD? If so the switchable gain is implemented in the analog path in this particular case. (The HDCD allows the required gain for HDCD mode to be implemented in the analog or digital domain.) The PMD-100 digital filter has a pin for external analog gain control... The other transistors are for muting - I wouldn't use them..
 
>>I'll want to try 192 kHz upsampling with the SRC, but its main function is reclocking. But as stated earlier, I'm suspecting (and hoping) the Lynx AES16 source clock is clean enough to skip the whole SRC.


As you didn't mind of my comments...:D


I see (datasheet) performance of SRC and 1794A at 192K is lower. As there's no source of music sampled this high :)confused:), I decided to fix the output of SRC at 24/96K.

:eek: with the graphs at datasheet, the Lynx must be a goooood performer to not benefit from SRC. In my guess, any SDIF cable will introduce noise/jitter/etc... that's why SRC is there, isn't it?;)

anyway, I'm changing layout as it was routed almost to the end. but the section between SRC and the converters was too confused.

One more note: Where did you get the information about Iref pin?? to change the resistor value does not affect performance at all? or maybe there's a range to make it work?

Regards.
 
I examined the specs, too, and I'll most likely keep it at 96 kHz. I'd just like to be able to try 192 before I decide :)

A lot of hi-res audio, like DVD-Audio, is sampled at 192 kHz, but the Lynx is restricted to 96 kHz. I'll be upsampling regular quality audio to 24/96 in software, in order to run software crossovers and DRC filters at that resolution. Higher resolution is always a plus when processing, regardless of source.

I'm convinced there will be some improvement with SRC, but I'm hoping it won't be audible... With five SRCs and ten DACs it's expensive and complicatet to get the clocks right.

I haven't seen any info on Iref other than awpagan's experience with it, but it's general logic. Iref supplies, as the name suggests, a reference for output current. When I drop the reference by increasing resistance, output current will naturally drop at the same ratio.
 
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The Lynx sound card is one of the best sound cards on the market. I doubt that a hardware SRC will do anything to improve the signal coming from it - it has one itself. Not even on the SPDIF path (with good cables). Below it is a pic for a Lynx - just to see what hardware it has.

An externally hosted image should be here but it was not working when we last tested it.
 
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I know, it's awesome ;-) I still want to try SRC, even if I doubt I'll ever use it. The main reason is the software reclocking, which doesn't necessarily match the card perfectly. Or it can take my 27 MHz LClock XO3. I honestly don't know how it works yet...

I got a pair of AES1605 cables to interface with my DAC. I don't know about the actual cable quality, but there are eight individually shielded twisted pairs in there, of pretty hefty size. These guys are serious about pro audio!
 
I appreciate all the extra work you've created for me ;) Anyhoo, two questions still remain - PSU resistors and decoupling caps.

abraxalito said:
also I don't think 10 Ohms series R in all of your chip supplies is necessarily a good idea - you need to know each supply pin's current load frequency spectrum and psrr sensitivities to determine if/how low DC Z is needed

Do I drop'em or keep'em? And if I keep them, how do I determine the best value?

And the always interesting decoupling caps... Is lyte + film + ceramic a decent way to go, are they needed on all rails, and if I cut the PSU resistors, will regulator decoupling one cm away be redundant? TI states reg decoupling isn't even necessary, but I'm guessing that's a minimum budget scenario.

Gimme perfect answers for those two, and I'll leave you alone ;)

Either way, I'll probably make four DAC boards (2x with and 2x without ASRC) and a few flexible opamp boards, so I can experiment with both zap an different opamp configuration, as well as position all Iref resistors and caps to be relatively easily replaceable.
 
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