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Buffalo III - flexibility without compromise.

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Also, what is the required difference for preparing an IVY III for stereo or 8-channel output? I read the IVY III guide but there is no mention of what needs to change.

There is a new version of the IVY-III manual which will be up soon which covers that.

Currently that information is also on Page 25 of the integration guide. As is just about any bit of info you might need. :)
 
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I can announce you all that ESS9018 accept a 125 Mhz clock.

Do not accept an 150Mhz one... In between I have not any oscillator to try with. It looks like the clock limit for ESS9018 is in fact between these frequencies: 125 - 150 Mhz. Maybe somebody else can find it more precise...
I did not (yet) analysed deeper/closer what this high clock frequency mean for the rest of the parameters of this DAC chip. With the 150 Mhz clock I had a quite big noise level (higher end of the spectre) on output. Not any perceptual noise with 125Mhz. The temperature of the chip not exceed 37 degree C.
I just invite you all to take a closer look of ESS9018 working at this clock frequency level.

What can I say for the moment is only perceptual point of view: everything gets more with this clock. The sound become (more than before...) extremely detailed, the sound stage extreme accurate, deeper and wider. More dynamics...
 
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Hello Coris
what´s your source for the 125 clock?
is it just a plain replacement, or do you have to change other details as well?
best
Leif
Norway

Hi
You know, this was only an experiment. So I didn`used an very special oscillator. An 10$ standard oscillator (50ppm/3,3v). I got it from Farnell this time... I will try further to find something better. No any others changes so far...
I think another oscillator will fit very well in to f. ex. Buffalo DAC (any version). The point is at any oscillator one use, have to be as closest as possible to the clock in pin of ESS9018. In my case I did this experiment on an consumer product which use this DAC chip (my Buffalo is on the way...). So I had to use more (in my case) an dedicated power supply/regulator for the clock. I think to go so far as to left up the ESS9018 clock pin and solder the oscillator output pin directly to that. I will come with a picture later on....
An SMD ceramic capacitor (10nF) have to be soldered directly between the +V/GND of the oscillator, an ferrite bead (1K/0,3ohm) between the +V pin of the clock and the 3,3v power supply for it. That is all.
I just forgot to give the information that is a slightly increase in current need of the ESS9018 after changing the clock to 125Mhz one. I had to adjust the main power supply for more approx. 30mA. I didn`t measured yet the used current directly on the DAC power pin.
 
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Lets move the discussion about clock experiments to another thread. Consider this notice that I may decide to start deleting posts.

But before that, I will interject one comment.

Dustin did some pretty interesting testing with clocks which I talked with him about several times. First after a point (and based on some other factors) higher clock does not bring better analog performance, In fact after a certain point (which is just about 80mhz) you actually start to get *less* dynamic range. This is because the DAC has a finite optimum rise/fall time and duty cycle for the clock. And as you move beyond the optimum parameters it will still work, but errors such as bounce and reflection and even the normal effects of capacitive loading at the input gate become far more apparent. At that point the quality of the clock becomes completely moot, because the device itself becomes the limiting factor.

Initially we chose 80mhz (based on my conversations with Dustin) for Buffalos because it was optimal for DNR. But then we decided that the practical value of moving to 100Mhz to support some sources was worth the compromise. The difference in DNR from 80mhz to 100mhz is very small, but it grows more significant at you move higher. It is not a linear curve.

One other note, while there has been talk that a clock 100Mhz or faster is required for 352.8khz and above when using asynchronous clocking. That is actually not even remotely true in my experience (and others). I have designed and used sources that worked just fine at that sample rate and higher with an 80Mhz clock installed. That being said, 100Mhz is better choice for higher sample rates because it give much larger margin for error. So in the end it is a pragmatic choice.

Cheers!
Russ
 
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While it is pretty cool to listen to music at super high sample rates it is important to keep a level head on the subject.

Virtually all DACs actually perform (measure) *worse* at super high sample rates. It is as true (at least it has been reported to me as true) for the ES9018 as it is for the TI and Wolfson chips. Like anything else there is a point of diminishing and even negative returns. This is not a criticism in the least. There is good reason that when DAC manufacturers go to measure their best numbers they use 44.1 and 48khz sample rates. :) The ESS9018 datasheet actually does not really touch on the subject, but if you look at the other DACs with more comprehensive data sheets you will see exactly what I mean.

Now lot of people think that things that measure worse can still sound better. And that's not really the point I am making here. I am just bringing up a natural and measurable fact that people should think over.

Now before you get any strange ideas I still believe that the ES9018 will handle the higher rates better than the TI and Wolfson chips. I am just trying to make sure people don't automatically equate higher sample rate with better audio quality - because it absolutely may not be.

Cheers!
Russ
 
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