Hi Mark,
I'll think about.
I was considering just learning how to use it so I'm not causing magic smoke.
What are the flaws with AC? This would be good to know.
The original question was about BW. Is it advantageous to pursue a wider impedance BW?
I think that was answered by pointing out that loading effects will just mess it up anyway.
Instead just raise the impedance and rely on the 1st order slope to pull up the high frequency impedance.
This is what I got so far.
if it ain't working in .Tran...
I've mentioned the limitations that make .AC a poor tool before
basically by linearizing about a DC operating point the AC analysis in Spice can be way off from the real operating point
the various Spice often have convergence problems and a transient at startup from the found DC point to even a flat line in .Tran shows the error in the calculated bias point
and at higher frequency the nonlinear device model operating points can be drastically changed by AC V, I in L, C that the DC analysis ignored - even for "cycle average"
so it is possible by jumping to .AC you are looking at unrealistic, even completely unstable cirucits
I've mentioned the limitations that make .AC a poor tool before
basically by linearizing about a DC operating point the AC analysis in Spice can be way off from the real operating point
the various Spice often have convergence problems and a transient at startup from the found DC point to even a flat line in .Tran shows the error in the calculated bias point
and at higher frequency the nonlinear device model operating points can be drastically changed by AC V, I in L, C that the DC analysis ignored - even for "cycle average"
so it is possible by jumping to .AC you are looking at unrealistic, even completely unstable cirucits
An externally hosted image should be here but it was not working when we last tested it.
If there is no difference, why pay more?
Couple Sziklai Q4Q7 tend to generate when increasing the resistance of R7 (to increase gain), and needs frequency compensation.
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I design amps in the simulator and studying their behavior. Then I build exactly in accordance with the model.
This is a complex model. But the amps operate in full compliance with them. Is it possible that the amplifier was unstable, if the model showed stability? No.
Is it possible that the amplifier was made with a lot more distortion than shown on the model?
No. The model correctly describes the linearity of the amplifier distortion is about 0.000,1%.
Need circuit for frequency compensation of these amplifiers in a strong change after Assembly?
No, usually such changes are generally not necessary.
I believe that the simulation results and want to thank its creators.
This is a complex model. But the amps operate in full compliance with them. Is it possible that the amplifier was unstable, if the model showed stability? No.
Is it possible that the amplifier was made with a lot more distortion than shown on the model?
No. The model correctly describes the linearity of the amplifier distortion is about 0.000,1%.
Need circuit for frequency compensation of these amplifiers in a strong change after Assembly?
No, usually such changes are generally not necessary.
I believe that the simulation results and want to thank its creators.
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LTspice is the best simulator I've used. In particular, I'm really impressed that it simulates stuff like what happens on overload in real-life.
But I obviously need to do a LOT more study to be as proficient as you .. and so do the other real LTspice gurus on this forum
I'm glad you're having fun. You will be surprised. LTspice quite adequately simulates the operation of the amplifier during overload. You enough to competently design a amplifier and it will work exactly as in the model. My amps have been fully tested and have shown full compliance with their models. I showed the comparison of the distortion obtained by simulation and measured a sound card - they match perfectly. I designed in LTspice switching power supplies. Now, you wouldn't believe.
You will be surprised. LTspice quite adequately simulates the operation of the amplifier during overload. You enough to competently design a amplifier and it will work exactly as in the model. My amps have been fully tested and have shown full compliance with their models. I showed the comparison of the distortion obtained by simulation and measured a sound card - they match perfectly. I designed in LTspice switching power supplies. Now, you wouldn't believe.
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I noticed that some people like to study the circuitry of 70-ies of the last century. I also like Antiques.
Models have limitations and/or gross simplifications. Timesteps have limitations as jcx explained before.
Sim cannot include unknown parasitic real world effects.
You've just been incredibly lucky so far, or you have been simming very simple circuits.
Jan
I model the amplifier, which, according to the manufacturer, distorts the signal at the level of 0.005% distortion. The model shows exactly the same: 0.005%. I'll take another amp with 0.001% distortion. The model confirms this: 0.001%. Similarly with other amps to distortion 0.000,1%. You have to agree that simple amps can't have the same level of distortion. I model the operation of the amplifier in limiting mode for output voltage. The oscilloscope shows the same waveform at exactly the same points of the amplifier.
I have no reason to say that the model differs from the amplifier. Of course, it is necessary to consider the parasitic parameters and then you need a good, accurate models of the transistors. The difference between timestep 100 ns and 10 ns is not so large to increase the size .raw file.
I have no reason to say that the model differs from the amplifier. Of course, it is necessary to consider the parasitic parameters and then you need a good, accurate models of the transistors. The difference between timestep 100 ns and 10 ns is not so large to increase the size .raw file.
I disagree. You may have had look using your models. The simulator is only as good as the models and the algorithms used. In one of my simulations using a MOSFET VAS showed excellent distortion results, but a 50 to 100 times higher distortions in real world.
My experience: If you are using good designed models the real world measured results are closer to the simulation.
I was talking about the models of the active devices, the weak point in all simulations, and responsible for very large differences between sim and measurements.
You really need to look into that.
Jan
The transistor models supplied with the simulator are often very bad. Hfe will be wrong, Cbe will be not present, Ft will be too high, and so on. You may get away with this for a while, but without taking notice you will eventually have a major problem.
You can inspect the model parameters yourself, looking for terms such as Cje=2p for instance. Or you can find transistor model collections assembled by someone who has already inspected the models. Some issues cannot be identified just by visually checking the model parameters.
You can inspect the model parameters yourself, looking for terms such as Cje=2p for instance. Or you can find transistor model collections assembled by someone who has already inspected the models. Some issues cannot be identified just by visually checking the model parameters.
Hi Pete,
Actually, I have just been off the forum for a few days due to the Holiday madness, and will indeed post it. I will also post the Powerpoint presentation as soon as I get dug out a bit. It will indeed be in my second edition, but I have no problem releasing some relevant stuff early.
Cheers,
Bob
Thanks Bob,
Have you ever looked at the Bryston 3B output stage, you might want to for a laugh
if not, the first one in this document: I'm naming it the "can't make up our mind" (CMOM)
output stage since it is a CFP with gain, with an EF thrown in:
http://www.bryston.com/PDF/Schematics/3B-8BST_SCHEMATICS.pdf
I simulated it here without the output protection:
http://www.diyaudio.com/forums/solid-state/301321-bryston-3biii-spice-simulation.html
Have you ever looked at the Bryston 3B output stage, you might want to for a laugh
if not, the first one in this document: I'm naming it the "can't make up our mind" (CMOM)
output stage since it is a CFP with gain, with an EF thrown in:
http://www.bryston.com/PDF/Schematics/3B-8BST_SCHEMATICS.pdf
I simulated it here without the output protection:
http://www.diyaudio.com/forums/solid-state/301321-bryston-3biii-spice-simulation.html
Hi Pete,
Yes, I have studied it, and even have plans to touch on it in my second edition. It is indeed an interesting design. As you correctly point out, it is essentially a CFP output stage with what I call an emitter follower "helper"; as the CFP input transistor draws current to turn on the upper PNP CFP output transistor, the emitter current of the CFP input transistor is used to drive the output emitter follower. Ideally, the two output transistors make equal contributions to the output current. One good feature claimed is that the driver transistor does double duty - the same current flowing through it serves the base drive needs of 2 output transistors.
Of course, the Bryston stage can also be viewed as a 2EF output stage with a PNP "helper" transistor that contributes output current when the driver conducts current by tapping into the driver collector and using it to turn on the PNP "helper".
For proper operation, the PNP output tranwsistors and the NPN output transistors generally have to be matched in current gain.
As shown in the schematics you provided, the output stage is a bit more complex than I have described here, it having current gain on the order of a Triple and it also having voltage gain. The voltage gain is also a claimed advantage, since the VAS need not swing as much and has more headroom as a result. Of course, there have been several CFP output stage designs in the past that configured the CFP to provide some gain for the same reason. Alas, VAS distortion is usually much less of a problem than output stage crossover distortion.
Cheers,
Bob
Hi, Bob!
Unfortunately, the last cascade VAS, even very carefully designed, making from 20 to 50 dB more distortion, than the follower output. To reduce these distortions need much loop gain, which usually nobody pays attention to it. From crossover distortion is fairly easy to get rid of reducing inductance in the emitter circuits of output transistors, where many people do use a ceramic wire wound resistors with high inductance.