Anything that shifts the internal corner frequencies of an amp could be seen as compensation. Base/gate stoppers are one such thing. Unfortunately the corner frequency of a gate stopper depends on the gate capacitance which is a moving target. Because the corner is dependent on the gate capacitance, and stability is to a degree dependent on this corner, then your amp will be unstable at extremes where gate capacitance changes too much, if it is dependent on the gate stoppers for global stability. Gate stoppers are usually only for local stability.
Therefore a gate stopper is a compensation that is not oblivious to widely varying semiconductor capacitance.
Another example would be to make an amp with FET outputs and no driver stage, and no TIS miller or shunt compensation. The stability of this amp would be entirely dependent on the gate capacitance.
There are 3 ways of dealing with this mechanism: swamping, rejecting, and tracking/correction/canceling.
An example of swamping would be to shunt the gates with 1nF capacitance; then the total capacitance would always be no less than 1nF and would be more reliable. This is not a popular option because it causes distortion. Another example of swamping would be to make the amp so slow that the corner introduced by the gate capacitance is inconsequential to stability. These are arguably the same thing, except the latter can be done in many ways that are not always obvious.
An example of rejection would be adding a driver stage. This makes the TIS more "oblivious" to the gate currents. A Baxandall TIS would be another example, which rejects voltage distortion rather than current distortion.
Tracking/correction/cancellation would be to use another pair of FETs in an identical condition to the ones in the circuit, measure their gate current and inject those into the circuit in question preemptively so that the circuit itself does not need to supply the drive current. To the circuit, the capacitances vanish. This approach requires very creative, methodical design and meticulous study and planning.
Rejection is the preferred method for low-distortion amps because it does not increase loading and hence distortion. Clever circuits methodically eliminate situations where swamping is the only option.
Therefore a gate stopper is a compensation that is not oblivious to widely varying semiconductor capacitance.
Another example would be to make an amp with FET outputs and no driver stage, and no TIS miller or shunt compensation. The stability of this amp would be entirely dependent on the gate capacitance.
There are 3 ways of dealing with this mechanism: swamping, rejecting, and tracking/correction/canceling.
An example of swamping would be to shunt the gates with 1nF capacitance; then the total capacitance would always be no less than 1nF and would be more reliable. This is not a popular option because it causes distortion. Another example of swamping would be to make the amp so slow that the corner introduced by the gate capacitance is inconsequential to stability. These are arguably the same thing, except the latter can be done in many ways that are not always obvious.
An example of rejection would be adding a driver stage. This makes the TIS more "oblivious" to the gate currents. A Baxandall TIS would be another example, which rejects voltage distortion rather than current distortion.
Tracking/correction/cancellation would be to use another pair of FETs in an identical condition to the ones in the circuit, measure their gate current and inject those into the circuit in question preemptively so that the circuit itself does not need to supply the drive current. To the circuit, the capacitances vanish. This approach requires very creative, methodical design and meticulous study and planning.
Rejection is the preferred method for low-distortion amps because it does not increase loading and hence distortion. Clever circuits methodically eliminate situations where swamping is the only option.
Understood this part ok, I think. Base stopper and gate capacitance create a pole themselves (F= 1/RC).
Does this type of amp have to very fast compared to the output devices such as the output devices are the dominant pole in the system?
The changes in gate capacitance would be tiny compared to 1n but the speed amp would be terrible and therefore wouldn't have much open loop gain at high frequencies hence high distortion.
This is where you start to lose me. Ok on the idea of having drivers to reduce the loading of the VAS. Tracking/correction/cancellation, I can see the logic but implementation is way beyond my comprehension at present.
Rejection, this is interesting. I have seen the baxandall TIS before I think it was in the Supertis (or at least something similar in the supertis). Could you suggest some good places to research rejection practices and theories.
Having read this I think in my amp design ended up verging on the swamping side of things. ULGF of 3Mhz with I think the fETs having a pole of around 7Mhz
I really appreciate that post
Paul
I usually try to avoid the bridging capacitors for the concern about bias pumping. This whole subject of possible rectification and EF vs Diamond is one that I'll consider expanding upon. My more recent MOSFET amps have used what I have called "folded emitter follower" drivers, which is essentially like the diamond. The key thing is that the current source pulling to the rail limits the amount of turn-on drive to the MOSFETs. The folded emitter followers act to turn off the MOSFETs, so the circuit errs on the side of lower current.
Cheers,
Bob
A BJT ignores it's collector voltage, so it provides a degree of inherent rejection of the collector signal. That's how a TIS works. If there is voltage distortion at the collector, the transistor's collector current ideally remains unchanged as opposed to using a resistor in the same situation. Transistors don't do this perfectly, but a Baxandall cascode is about as perfect as you can get.
Stability compensation in itself is inherently swamping because that is the only way to tame the pole-mania of all those transistors combined into one feedback loop. However gains might be made by compensating the stages individually which often allows for a decrease in total overall swamping.
Circuits which obtain a high degree of swamping while meeting their design goals can be very reliable, so unless you're not satisfied with your THD performance, then I see nothing wrong with swamping as long as it does not cause problems with RFI (slew limiting). What I'm trying to achieve is an amp with minimal swamping and maximum rejection so that it is virtually immune to EMI. In simulation I get .0003%THD at 100KHz at near full power, for instance, and it is impossible to drive the amp to slew limit except with a full input square wave.
Edmund's TIS amp is great for study. You should think about current distortions and voltage distortions separately - you can build a quad EF output stage but if the TIS has no voltage distortion rejection, all your buffering may be for naught. Internal Miller compensation directly bypasses the rejection abilities of the TIS, which is why TMC, TPC and so on can be such an improvement.
I think your amp is very well thought out and THD is incredibly low. I would however try to simulate inductances down to 5nH before I built a prototype because even tiny parasitics in special places are killers. Even if the parasitics aren't realistic, you learn in simulation how to deal with problems that may arise from different layouts. Designing a perfect amp is hard, but it cannot be done in real life without an equally deep study of parasitics.
I did not read this in any textbook, it is just an understanding I came to. So it is totally non-canon. In reality all these things could be described in terms of relative impedances, feedback theory, bode plots and so on. You should try to understand why these ideas apply at a component level. For instance everyone knows how to plot open-loop gain and find phase margin, but who has carefully thought about how all the impedances and mechanisms in the circuit work together to produce this effect? Can you tell me how a single component change will affect the magnitude and phase of the open-loop gain at a given frequency and why? This is the understanding that is really useful. Most other things are abstractions with the purpose of simplifying. You don't simplify (make assumptions) when you are trying to understanding a whole phenomenon. You simplify when you want to give instructions anyone can follow. The problem is when this is portrayed as understanding - people who falsely believe this instantly stop learning and then wonder later why they have so much trouble with difficult problems.
Do not succumb to the gravity of simplification. Trying to understand the big picture in all its meticulous detail is a great exercise for the brain and will literally make you smarter.
Stability compensation in itself is inherently swamping because that is the only way to tame the pole-mania of all those transistors combined into one feedback loop. However gains might be made by compensating the stages individually which often allows for a decrease in total overall swamping.
Circuits which obtain a high degree of swamping while meeting their design goals can be very reliable, so unless you're not satisfied with your THD performance, then I see nothing wrong with swamping as long as it does not cause problems with RFI (slew limiting). What I'm trying to achieve is an amp with minimal swamping and maximum rejection so that it is virtually immune to EMI. In simulation I get .0003%THD at 100KHz at near full power, for instance, and it is impossible to drive the amp to slew limit except with a full input square wave.
Edmund's TIS amp is great for study. You should think about current distortions and voltage distortions separately - you can build a quad EF output stage but if the TIS has no voltage distortion rejection, all your buffering may be for naught. Internal Miller compensation directly bypasses the rejection abilities of the TIS, which is why TMC, TPC and so on can be such an improvement.
I think your amp is very well thought out and THD is incredibly low. I would however try to simulate inductances down to 5nH before I built a prototype because even tiny parasitics in special places are killers. Even if the parasitics aren't realistic, you learn in simulation how to deal with problems that may arise from different layouts. Designing a perfect amp is hard, but it cannot be done in real life without an equally deep study of parasitics.
I did not read this in any textbook, it is just an understanding I came to. So it is totally non-canon. In reality all these things could be described in terms of relative impedances, feedback theory, bode plots and so on. You should try to understand why these ideas apply at a component level. For instance everyone knows how to plot open-loop gain and find phase margin, but who has carefully thought about how all the impedances and mechanisms in the circuit work together to produce this effect? Can you tell me how a single component change will affect the magnitude and phase of the open-loop gain at a given frequency and why? This is the understanding that is really useful. Most other things are abstractions with the purpose of simplifying. You don't simplify (make assumptions) when you are trying to understanding a whole phenomenon. You simplify when you want to give instructions anyone can follow. The problem is when this is portrayed as understanding - people who falsely believe this instantly stop learning and then wonder later why they have so much trouble with difficult problems.
Do not succumb to the gravity of simplification. Trying to understand the big picture in all its meticulous detail is a great exercise for the brain and will literally make you smarter.
Keantoken,
You are at such a level of knowledge, its very impressive. It's takes a lot of studying and dedication to get to that level. I must spend at least 5 hours everyday working at this by the end my brain hurts (I'm at that point now - parasitics...) and still working at the basics.
Fully agree with you about not simplifying things. Getting a proper understanding of what is going on is important especially if you have bigger plans and want to advance things. As far as my understanding goes with my design, I can tell you the effect of each part but not give a detailed fundamental reasoning. I realise I'm a long way from a prototype and that parasitics are a major problem. An LTspice simulation without them isn't much use. Parasitics as far as I see them will produce a whole load of resonant circuits and also limit currents where at present parts of the circuit see perfect supplies and perfect super conductors. Nothing like reality. This is the next stage and I have already hit a problem, it will be solved and knowledge will be gained. The plan is to fully simulate with parasitics. Build a prototype get that right and then use it as a basis for more advanced ideas like the baxandall TIS (which I am as wary of as the three transistor VAS).
Looking at the details is where its at currently. Eg. Even getting the power rails right is worth the effort. Basic, but essential if the goal is a good sounding amp.
Just for a laugh I simulated my amp at 100Khz and got 0.02% THD. Your getting results getting on for two orders of magnitude better. There's an good illustration and the gulf between where you are and where I am.
Thank you for the kind words about my attempt at amp design (At least I know I'm not heading down a technological dead end) and for the encouragement regarding the pursuit of understanding.
Look forward to hearing that you have achieved your goals with the new amp design.
Paul
You are at such a level of knowledge, its very impressive. It's takes a lot of studying and dedication to get to that level. I must spend at least 5 hours everyday working at this by the end my brain hurts (I'm at that point now - parasitics...) and still working at the basics.
Fully agree with you about not simplifying things. Getting a proper understanding of what is going on is important especially if you have bigger plans and want to advance things. As far as my understanding goes with my design, I can tell you the effect of each part but not give a detailed fundamental reasoning. I realise I'm a long way from a prototype and that parasitics are a major problem. An LTspice simulation without them isn't much use. Parasitics as far as I see them will produce a whole load of resonant circuits and also limit currents where at present parts of the circuit see perfect supplies and perfect super conductors. Nothing like reality. This is the next stage and I have already hit a problem, it will be solved and knowledge will be gained. The plan is to fully simulate with parasitics. Build a prototype get that right and then use it as a basis for more advanced ideas like the baxandall TIS (which I am as wary of as the three transistor VAS).
Looking at the details is where its at currently. Eg. Even getting the power rails right is worth the effort. Basic, but essential if the goal is a good sounding amp.
Just for a laugh I simulated my amp at 100Khz and got 0.02% THD. Your getting results getting on for two orders of magnitude better. There's an good illustration and the gulf between where you are and where I am.
Thank you for the kind words about my attempt at amp design (At least I know I'm not heading down a technological dead end) and for the encouragement regarding the pursuit of understanding.
Look forward to hearing that you have achieved your goals with the new amp design.
Paul
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<REAL LIFE> sticker
Bob, like many others, I like your Chapter 3 which traces the evolution of a particular type of amp. It appears this exercise is purely LTspice .. but the circuits are general enough to have been built by your good self in Jurassic Times .. even if they don't represent your favourite 'advanced' topologies.
May I suggest that where a 'real life' device was built to one of the circuits in Chapter 3 or was close to one of these, a <REAL LIFE> sticker be applied to the figure.
This would allow you to pontificate further on discrepancies between 'real life' & SPICE.
I obviously believe the most useful models are those that have been confirmed in 'real life' .. at least in some fashion.
_______________
Using the simplest possible circuit that achieves the design goal allows you to make the model/sim more 'complex' and closer to reality.
There are very few complex amp circuits that can't have their design objectives met or bettered with simpler circuits .. provided the 'simple' circuits are thoroughly understood and not 'simplified'.
The model of any complex circuit is by its very nature, 'simplified' and hence not as accurate as a simple circuit with the same amount of care applied to its understanding.
Bob, like many others, I like your Chapter 3 which traces the evolution of a particular type of amp. It appears this exercise is purely LTspice .. but the circuits are general enough to have been built by your good self in Jurassic Times .. even if they don't represent your favourite 'advanced' topologies.
May I suggest that where a 'real life' device was built to one of the circuits in Chapter 3 or was close to one of these, a <REAL LIFE> sticker be applied to the figure.
This would allow you to pontificate further on discrepancies between 'real life' & SPICE.
I obviously believe the most useful models are those that have been confirmed in 'real life' .. at least in some fashion.
_______________
Kean, there is a related issue which is how close to 'real life' are your models. The more complex the circuit, the larger the PCB, bla bla ... the more likely that sim/theories/pontificating are far from reality.
Using the simplest possible circuit that achieves the design goal allows you to make the model/sim more 'complex' and closer to reality.
There are very few complex amp circuits that can't have their design objectives met or bettered with simpler circuits .. provided the 'simple' circuits are thoroughly understood and not 'simplified'.
The model of any complex circuit is by its very nature, 'simplified' and hence not as accurate as a simple circuit with the same amount of care applied to its understanding.
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I don't know what you're trying to say. I meant simplification of understanding, not simplification of circuits. Of course circuits should be simplified if they can be.
But I don't think real circuits should be degraded to make the simulation model more "accurate".
The simulator is more for problem solving anyways, than prediction. The idea is to gain an understanding that will help you solve problems in real circuits. Only then can you make the necessary adjustments to make the design meet the real life goals. The degree of accuracy to real life is just a bonus and helpful side-effect, but which needs to be proven.
But I don't think real circuits should be degraded to make the simulation model more "accurate".
The simulator is more for problem solving anyways, than prediction. The idea is to gain an understanding that will help you solve problems in real circuits. Only then can you make the necessary adjustments to make the design meet the real life goals. The degree of accuracy to real life is just a bonus and helpful side-effect, but which needs to be proven.
Simplicity - Marcus Aurelius, via Dr. Lecter
One of the tools to achieve this is 'accurate' simulations.
A simple circuit simulated 'accurately' is more likely to achieve its full potential than a complex circuit which is difficult if not impossible to optimise cos the tools (sim/theory etc) are just too far from the complex reality.
A simple circuit doesn't have to be 'degraded'. But complex circuits are often 'degraded'
Yes. I agree with you there. There can never be too much understanding.
There are VERY FEW occasions, given real understanding that a simpler circuit can't outperform a complex one.
One of the tools to achieve this is 'accurate' simulations.
A simple circuit simulated 'accurately' is more likely to achieve its full potential than a complex circuit which is difficult if not impossible to optimise cos the tools (sim/theory etc) are just too far from the complex reality.
A simple circuit doesn't have to be 'degraded'. But complex circuits are often 'degraded'
Keantoken, kgrlee,
I think we are all singing from the same song sheet. Of course, simulation is only an approximation but a simulation ignoring parasitic properties is even further from the truth. For, example, power rails, if you have a perfect voltage source and perfect tracks then any old decoupling (or even no decoupling) will appear to work but reality will be very different. Parasitic inclusion forces the understanding of how to select decoupling components even if the resulting values are wrong when transferred to real life. You are now armed with the knowledge of how to solve the issue with the aid of a scope. I have experience in creating a blameless style amp the simulated fine (with no parasitics or detailed checking) but when it was made worked perfectly unloaded. As soon as it saw a speaker it oscillated. Don't want to repeat that mistake.
Complexity, for the sake of complexity is no good. Especially for beginner types. Examples of this are cascode circuits. Look great in simulation but further research indicates problems with oscillation. Same goes for the three transistor VAS as discussed earlier in this thread. All those extra components for not a lot of gain and potentially amp ending problems for a beginner in real life. If you have fundamental understanding, these circuit topologies pose no real issue but you need that understanding and experience.
As for simulating not being prediction, from my basic view point, I think it has some value but to expect THDs anywhere near the ones simulated is misguided. To be within a factor of 10 to 100 times predicted simulation THD would be seen as a great success and would provide a base to improve from.
I think we are all singing from the same song sheet. Of course, simulation is only an approximation but a simulation ignoring parasitic properties is even further from the truth. For, example, power rails, if you have a perfect voltage source and perfect tracks then any old decoupling (or even no decoupling) will appear to work but reality will be very different. Parasitic inclusion forces the understanding of how to select decoupling components even if the resulting values are wrong when transferred to real life. You are now armed with the knowledge of how to solve the issue with the aid of a scope. I have experience in creating a blameless style amp the simulated fine (with no parasitics or detailed checking) but when it was made worked perfectly unloaded. As soon as it saw a speaker it oscillated. Don't want to repeat that mistake.
Complexity, for the sake of complexity is no good. Especially for beginner types. Examples of this are cascode circuits. Look great in simulation but further research indicates problems with oscillation. Same goes for the three transistor VAS as discussed earlier in this thread. All those extra components for not a lot of gain and potentially amp ending problems for a beginner in real life. If you have fundamental understanding, these circuit topologies pose no real issue but you need that understanding and experience.
As for simulating not being prediction, from my basic view point, I think it has some value but to expect THDs anywhere near the ones simulated is misguided. To be within a factor of 10 to 100 times predicted simulation THD would be seen as a great success and would provide a base to improve from.
Perhaps some of you who are well versed with LTspice could start another thread where you could help us noob's to use this tool. I haven't tried to jump into the simulations at this point. I am still reading and re-readiing both Self and Cordell to have enough understanding to even think of using a sim software package. But I am sure others who are much farther along than I am could use some help in how to use Spice. How about it, anyone want to start that up?
Hi keantoken,
When you talk about "accurate" simulation and the inclusion of parasitics, I am interested in how far you take this with your own sims. Do you include inductance in the terminals of every transistor in your circuit, for example? How about the modelling of passive components such as capacitors? Fully accurate high-frequency modelling of MLCCs for example requires a distributed model with many tens of passive components.
When you talk about "accurate" simulation and the inclusion of parasitics, I am interested in how far you take this with your own sims. Do you include inductance in the terminals of every transistor in your circuit, for example? How about the modelling of passive components such as capacitors? Fully accurate high-frequency modelling of MLCCs for example requires a distributed model with many tens of passive components.
I developed my own 'linear' circuit analysis package circa 1980 to help with Power Amp stability.
In every case where sim has given some new insight and practical guidance for 'real life', it was the result of refining the model until it reflected some 'real life' artifact. The satisfying thing was then it would then predict several useful 'real life' things.
My point is you ALWAYS have to run sims in parallel with a 'real life' investigation to keep a hold on reality. That's when the sims are most useful.
_____________
But to answer your question, one BIG effect that most people don't sim is the leads to the big PSU caps. This has major effect on stability & THD. Cherry's A New Distortion Mechanism in Class B Amplifiers has clues & cures.
The important 'cures' are physically small but large value electrolytics decoupling the 'small' signal stages and output rails to Dirty earth located AT the devices. Electrolytics have just the right amount of ESR to deal with these evil effects.
This was an 'Ah Ha!' moment for me which sims helped to define. It allowed much better performance from simple circuits.
This also begs the issue of whether to simplify 'real life' so it better reflects the sim or increase the complexity of the sim to reflect 'real life'.
I try to do both. That means no long leads to the OP devices etc. A 50W 8R amp should have everything on a 2" x 3" single sided through hole PCB including the outputs.Unlike the true gurus (and budding true gurus like Kean), my small brain can only handle simple circuits (and their complex sims). Blameless is about my limit
______________
Another is parasitics on output FETs. But FETs often give excellent performance using very simple drivers. If the topology has only a few devices in the forward path, it has the potential for excellent stability. The sim may then 'get away' without these complications.
I've seen some of Kean's sims with FET parasitics. He likes complex.
Remember, the sim doesn't have to be exact. 'Accurate' in our context is that it sims important 'real life' stuff.
Great idea!! I am having a few issues with the LTspice as well, like when I am doing the FFT Simulation on p394-396, I can not get the 0.035% THD number, as published, so I keep trying to see what i am doing wrong, I am using Bob's 2N5551 model as well.
Another thing I want to do is to reproduce the THD measurements for the PAmps' as is done in Chapter 3!!I am using V4.19a. Then foldin some other ideas that are in later chapters.
Rick
If I want, I can use my Tek FG504 to measure parasitics directly, and I probably need to before I will have a good idea how to estimate parasitics. This is one of those things that should FOR REAL make the simulation more accurate.
The first thing I do is model a basically realistic power supply. This means adding power source resistance and inductance, and adding ESR and ESL to all decoupling. I don't model DF effects. Since the power rails are such high Q, and the OPS so susceptible to noise, there really isn't any stretch of wire that is insignificant.
After that, I add output stage parasitics. I include the inductance of all the nodes which may carry significant current, or that have very low impedance. I also stick small inductances in many other places to see what effects they have, in case I missed something.
I have not estimated coupled trace inductance because while everyone tells me how easy it is, none of them has told me how they do it yet. Furthermore, I usually do not end up with long parallel traces unless I'm intentionally minimizing the current loop.
After I start building a prototype, I try adding parasitics everywhere to see how I should do the layout and which traces I should shorten.
Calculators such as this can help:
Wire Over Plane Inductance | Electrical Engineering Tools | EEWeb
Microstrip Impedance | Electrical Engineering Tools | EEWeb
Go to the SPICE tab on my homepage at CordellAudio.com - Home. There you will find easy instructions for downloading LTspice and a tutorial to get you up and running. My models are there as well.
You can probably be running your first simulation in about 15 minutes.
Cheers,
Bob
Kean's parasitics & sims.
I grovel at your feet o' Guru Kean and beg forgiveness for calling Your True Guruness just a budding guru
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Thanks a lot. A good informative post, as usual.
A tool I've found useful is TX-Line.
I think you may be jealous of my new toy that should be arriving in the next few weeks:
A Wayne-Kerr 65120P
And I'll also be getting a 4 GHz 'scope with 20 GSa/s sampling rate
At the moment I have a Bode 100 "low-cost" VNA that I've used to demonstrate good agreement between predicted and measured power-distribution impedance, but only up to 40 MHz and only a small, low-power board. I'm looking forward to being able to go up to 120 MHz, with far greater high-frequency accuracy to boot
I had problems getting a consistent FFT noise floor.
But Eugene Dvoskin’s Total Harmonic Analyzer in the LTspice Yahoo group is very usable. When I get a good noise floor in my FFT efforts, the results match this.
Since I started using this, I've given up trying to find out why my .four stuff dun wuk.
CAVEATS
- takes a long time .. about 2-3 cups of coffee for a power amp
- There seems to be some sort of settling issue in the calculation so the residual plot is wonky at LF. Seems to be OK by 20kHz. The THD figure it spits out seems accurate.
- Amp must be DC coupled all the way or else it takes MUCH longer. You need to twiddle it to do this.