a possible answer - at least the sim may help understanding the issue: http://www.diyaudio.com/forums/solid-state/56860-optoisolator-vas-bias-comp-diff.html#post637347
With a resistive input stage load, the voltage drop across the load resistors presents a well-defined DC bias voltage Vb to the second stage, equal to Vb = Rl*I/2 (with Rl the collector load resistor and I the tail current of one input stage). This bias voltage can then be used, usually together with an emitter resistor Re for the transistors in the second stage, to establish a proper bias current equivalent to Ib = (Vb - Vbe)/Re.
With a current mirror, there is no well-defined bias voltage to the second stage as the current mirror output is "floating", i.e. a high resistance current node. Under such conditions, the bias current of the second stage will be ill-defined, as it now is substantially dependent on hFEs and Early voltages of various transistors.
Samuel
Absolutely, but not so ill-defined that simulators can't solve it. I have tried two versions, with very different circuit values, and in both cases the DC bias point was found with no problems at all. Undoubtedly the answers depend on device characteristics, but an answer can be found.
One version was Bob's Fig 7.9, of which he says "see if you can calculate the VAS current.. You can't." Well, I could, and the answer is 15.8 mA. I was hoping Bob might come along and shed a little more light on his thinking there; the implication seems to be that the sensitivity to device characteristics is so great that any sort of operation is impossible.
However, another worrying thing about the configuration is that... it works. Mostly.
I built a model version with a push-pull EF-VAS and it is working very nicely about a foot from my elbow at the moment. THD is 0.00064% for 11Vrms out, 1 kHz. (genmon= 0.00041%) There was no tweaking or adjustment or selecting of devices. The VAS standing current appears to have adjusted itself to a very low value (a few tens of uA) but despite this the linearity is extraordinarily good. The fox in the ointment is that there are some nasty HF stability problems when it is driven with higher frequencies, eg 20 kHz, and this may well be rooted in problems with current indeterminacy.
None of this should be taken as meaning I think that the current-mirrors are a good thing in a push-pull VAS, nor indeed even that I think a push-pull VAS is necessarily a good idea. There is clearly more research needed...
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Hi Doug,
I'm sorry I'm late to get onto this. It looks like you have already gotten some pretty good answers. The circuit in Randy Slone's book is where I first saw this problem circuit. Most of us like current mirror loads for a lot of good reasons you and I have explained. Many of us also believe strongly in a push-pull VAS. Many also like the symmetry of the double complementary input stage (it looks so nice and symmetrical when you draw it, at least). Put those ideas all together and you get this problem circuit.
The key to understanding the problem is that it is at minimum unwise to design a circuit that depends on the non-ideality of the devices. For this reason, we must be able to calculate the VAS standing current with infinite beta and no Early effect in the NPN and PNP VAS Darlinton pairs. We must also assume no Early effect in the other transistors as well. But now we must also factor in other real-world mismatches, like input transistor diff pair Vbe offset and differences in emitter degeneration resistor values due to tolerance. It is then easy to see that one can arrive at virtually any VAS standing current, given small mismatches and extremely high beta transistors.
I'm surprized that you were able to calculate a standing current value, and I'm gussing you had to make some assumptions about finite beta, etc.
I suspect a SPICE run will readily show the problem if you use high-beta transistors and make all of the degeneration resistors 470 ohms except one in my Figure 7.9. Take that one and vary it from 440 to 500 ohms, and you should see the VAS standing current go all over the place.
Note in Figure 7.10 I show how to greatly mitigate this problem in this circuit while still retaining most of the advantages of the current mirrors. I just add a helper transistor to the current mirror and add some "load" resistance.
Cheers,
Bob
Hi Guys
I have greatly enjoyed both Doug Self's books and Bod Cordell's book. Thanks for writing them!
I think if one surveys a lot of amp schematics - ones for production amplifiers that perform well and/or have stood the test of time - you see a general approach with respect to the use of current-mirror loads for input stages:
Single-diff stages use CMs if they generate a single-ended output to the VAS, which itself works against a current source.
Single-diff amps producing push-pull drive to the VAS generally use resistive loads as this makes defining the push-pull currents easier. Besides, the push-pull VAS has twice the gain of a single-ended one, so extra gain in the diff that a CM might provide is not required. Bob's current-mode loads work very well if one is willing to add the extra buffers to drive it. It also provides a circuit monitoring point where one can generate anti-clipping circuit control signals.
Complimentary-diffs almost universally use resistive loads. Again, easy definition of current in the push-pull VAS, and gain is doubled by virtue of the second diff and more added by the push-pull VAS.
I appreciate Doug's having to build to budget and trying to keep parasitic demons at bay by using the simplest audio path, but the double-diff with resistive loading and push-pull VAS takes about the same amount of total circuitry as the CM-loaded single-diff with CCS-loaded VAS. Even with unmatched devices, both give credible DC and AC performance. With matching, performance can be "taken up a notch". Since the CM can add noise just as the second diff can, it looks like it comes down to what Bob said earlier in this thread, that you pick which dragons to sley. In both overall arrangements, similar slew rates are attained.
Like Doug, I prefer CFP output stages. The potential for best use of the rails is one detail, and the option for having a local feedback loop in an enhanced-beta CFP is another, as one can have nested loops - one around the output stage and the global loop. I like the push-pull VAS because of its high available drive current and symmetry. Where in the past I would have stuck CMs into the comp-diff front end to eliminate critical resistor load values, I am more inclined these days to figure those out. I think the criticality may be moreso for single-ended output than for push-pull.
I've built lots of amps with both the CFP output and the EF-T without any oscillation issues. Guess I've been lucky.
Keep inspiring us!
Have fun
Kevin O'Connor
I have greatly enjoyed both Doug Self's books and Bod Cordell's book. Thanks for writing them!
I think if one surveys a lot of amp schematics - ones for production amplifiers that perform well and/or have stood the test of time - you see a general approach with respect to the use of current-mirror loads for input stages:
Single-diff stages use CMs if they generate a single-ended output to the VAS, which itself works against a current source.
Single-diff amps producing push-pull drive to the VAS generally use resistive loads as this makes defining the push-pull currents easier. Besides, the push-pull VAS has twice the gain of a single-ended one, so extra gain in the diff that a CM might provide is not required. Bob's current-mode loads work very well if one is willing to add the extra buffers to drive it. It also provides a circuit monitoring point where one can generate anti-clipping circuit control signals.
Complimentary-diffs almost universally use resistive loads. Again, easy definition of current in the push-pull VAS, and gain is doubled by virtue of the second diff and more added by the push-pull VAS.
I appreciate Doug's having to build to budget and trying to keep parasitic demons at bay by using the simplest audio path, but the double-diff with resistive loading and push-pull VAS takes about the same amount of total circuitry as the CM-loaded single-diff with CCS-loaded VAS. Even with unmatched devices, both give credible DC and AC performance. With matching, performance can be "taken up a notch". Since the CM can add noise just as the second diff can, it looks like it comes down to what Bob said earlier in this thread, that you pick which dragons to sley. In both overall arrangements, similar slew rates are attained.
Like Doug, I prefer CFP output stages. The potential for best use of the rails is one detail, and the option for having a local feedback loop in an enhanced-beta CFP is another, as one can have nested loops - one around the output stage and the global loop. I like the push-pull VAS because of its high available drive current and symmetry. Where in the past I would have stuck CMs into the comp-diff front end to eliminate critical resistor load values, I am more inclined these days to figure those out. I think the criticality may be moreso for single-ended output than for push-pull.
I've built lots of amps with both the CFP output and the EF-T without any oscillation issues. Guess I've been lucky.
Keep inspiring us!
Have fun
Kevin O'Connor
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It work , but not with Slone s version , while the improvement
that can be seen in Bob Cordell s book is not enough to make
the circuit working systematicaly.
As pointed by Bob , simulators allow right resolution of the intrinsical
equations , so much that a proper design with robust stability can
be designed using components that have relatively large caracteristics dispersion.
All I did was ask the simulator for a DC bias point! Obviously that uses all the parameters in the SPICE models. I was expecting some wild answers; it was getting reasonable values of VAS current twice that started me thinking.
Thank you all for your input. I thought this subject would benefit from a bit of ventilation. I must admit to being intrigued by the very low THD produced by a circuit that in theory cannot work at all. I will try to find how it does with such a tiny standing current when I get some spare time. (hollow laughter)
I note one of the recent posts has disappeared.
Now here's a thought... the root of the problem here is that we have two mirrors. There is nothing to stop us making a double-input push-pull stage that has only one current mirror. The non-mirror input stage will define the VAS standing current and the single mirror will accommodate itself to that. I have just built a model amplifier on those lines and it works very well, with pleasingly low distortion.
A configuration is born.
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Looking at BJT logarithmic amplifiers might provide some ays to stabilize bias ithout orrying about drift. For instance, look at figure 21 here:
http://sbisc.sharif.edu/~comcir/readings/mixers/mixer-gilbert.pdf
As BJTs are logarithmic for several octaves I think they may be relatively accommodating, if e think like mathematicians. After all, the repeatable logarithmic behavior is the only reason e use current mirrors.
* My button does not ork.
http://sbisc.sharif.edu/~comcir/readings/mixers/mixer-gilbert.pdf
As BJTs are logarithmic for several octaves I think they may be relatively accommodating, if e think like mathematicians. After all, the repeatable logarithmic behavior is the only reason e use current mirrors.
* My button does not ork.
Probably, but so long as both directions are fast enough, with a healthy safety margin, who cares?
you automatically loose a factor of 1/2 of the current from the diff pair with R collector load driving one VAS vs the current mirrored diff pair
and some more from the current shunted by the collector R
I assume anyone who cares to use the complementary diff pair would find this unacceptable - even if not objectively justifiable
and some more from the current shunted by the collector R
I assume anyone who cares to use the complementary diff pair would find this unacceptable - even if not objectively justifiable
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Hi Guys
All of that is a given, jcx. Slew rate for most circuits I referred to above is often 60V/usec, so obviously anything above or asymmetric is likely of little concern.
It must have been Marshall Leach who did not like asymmetric signal paths because he felt they were harder to stabilise. I thought there might be a pithy comment about that, even though the asymmetry here is not so bad.
To me the comp-diff input + push-pull VAS + comp output falls in line with Otala's recommendations much better than his own circuit. It seems crazy that three gain stages within the loop would become the standard for hundreds of products, despite the difficulties of stabilising such a beast. Although it does reflect latter day tube practices which also employed three stages within the loop. (I don't count followers as gain stages since their gain is unity and nominally nonproblematic)
Have fun
Kevin O'Connor
londonpower.com
All of that is a given, jcx. Slew rate for most circuits I referred to above is often 60V/usec, so obviously anything above or asymmetric is likely of little concern.
It must have been Marshall Leach who did not like asymmetric signal paths because he felt they were harder to stabilise. I thought there might be a pithy comment about that, even though the asymmetry here is not so bad.
To me the comp-diff input + push-pull VAS + comp output falls in line with Otala's recommendations much better than his own circuit. It seems crazy that three gain stages within the loop would become the standard for hundreds of products, despite the difficulties of stabilising such a beast. Although it does reflect latter day tube practices which also employed three stages within the loop. (I don't count followers as gain stages since their gain is unity and nominally nonproblematic)
Have fun
Kevin O'Connor
londonpower.com
There is the possibility of combining to different types of transistors for the complementary VAS, say Jfet and BJT, and bias them so that nominally they have equal gain. This ay, due to the asymmetric transfer curves, hen bias creeps up, it also produces offset hich must be corrected in the feedback loop. This correction returns bias to normal. It seems that controlled asymmetry is the key to this idea, and combining devices ith different gm curves is a clever ay of achieving this ithout having a grossly unbalanced complementary VAS. Does anyone understand hat I'm saying?
Don't forget the useful and versatile 1-transistor gyrator. Don't do this ith any high-voltage transistors, or transistors ith bad Vcesat behavior (2N5551...). I think 1N4148's generally have greater breakover than a BJT, but anyone building this ould need to make sure so that VAS quiescent isn't too high right after turn-on. Sort of ugly I kno. Remember you sa it here!
The RC can cut into LF OLG if not large enough. I have not examined this circuit for undesirable behavior, ho knos hat ill happen under clipping conditions. R1 may need to be much larger, not sure, but if it is it ill increase VAS bias tempco.
The RC can cut into LF OLG if not large enough. I have not examined this circuit for undesirable behavior, ho knos hat ill happen under clipping conditions. R1 may need to be much larger, not sure, but if it is it ill increase VAS bias tempco.
