john curl said:Don't worry Glen, he doesn't think much of me either.
Jeez, John, we can't seem to agree on anything
. I think highly of both of you guys. That doesn't always mean I'll agree with you. Hey, sometimes your responses make me think you don't like me, but I know that's not the case .Cheers,
Bob
lumanauw said:
Off course it is not
Hmmm.... I understand about moderators in the bar, but in the family?
...and I like Bob's sense of humor. Especially, when he insisted me on using SPICE to check my hearing.
Bob said most of what i intended for me, so here is just the extra on that
Given that the Rdson of the LMOS is on the order of 0.8 ohms (and that at maximum permissible Vgs!), it may be prudent to include a source resistor of about the same value in the drain of a IRFP240 and see what it does for linearity.
The reason why a LMOS costs $7 is because it is being manufactured by 2 (not sure about the third) manufacturers, and all of them are still based on the very first die made by Hitachi - they still make them, just in a TO3P case rather than TO3. Audio is by far too small now to generate technological advances in this field, which is a pity. Much better laterals could be made even with semi-obsolete processes of today. Meanwhile, pretty much everyone doing discrete semis is making some HEXFET clone, they are bieng churned out by the millions. Hence low price.
As for smaller capacitance, because of less overlap of D and S in the LMOS silicon, only Cgd is signifficantly lower than that of the HEXFET per amp of Id. This should always be remembered because both LMOS, HEX/VMOS, PIMOS, various trench architectures - they are all array semiconductors. You get bigger types by essentially making the array larger. IRFP240 may have over twice the Cgs but it also handles over twice the current. Besides, the actual Cgs is not the end-all: how much of it is effectively being driven, depends on the part's transconductance. This is usually about an order of magnitude larger for HEXFET, at comparable currents. Very handy in a follower, because apparent Cin is decreased.
And that is horrendous? Try this with a BJT...
BTW it is customary for a VMOS to have the tempco inflection point at about the maximum Id, give or take 3dB or so
Honestly, I really don't see a problem with this. I've used non-degenerated HEXFETs (no surce res) and they were pretty much dead stable using a simple Vgs multiplier to generate bias. The latest amp I did this way has about 5% bias drift from 25 to 100 deg C. OK, the gm of a MOSFET is truly small copmared to that of a BJT at comparable currents, but still - I would hardly call this horrendous or difficultto stabilise. Compared to some BJT stages I did, it was dead easy.
I really don't see how this is cause for exasperation? It is routinely done with BJTs for the same reason.
Yes, this is a real issue with HEXFETs driven to the edge, and may result in a form of thermal runaway. However, keep in mind that for the typical IRFP240, we are starting off at 0.18 ohms at 25C, and that it is very difficult to use it in this area in a linear application because you end up violating SOA elsewhere - but that part of the SOA is indeed important for switching applications.
To compare - Laterals start at 0.8 ohms and go up to as much as 1.5 ohms.
That being said, most modern BJTs used for audio power also have resistive losses, and they are not exactly small. Look at the saturation characteristics of say, a 2SC2922 - the clue is not only the rise in Vce at high currents that has a nice linear scaling with current, but also the rise in Vbe to maintain saturation - it goes up to volts! This is because the construction is also an array, with emitter resistors incorporated in the array transistors, which produce a voltage drop. Also, have a look at input capacitances for such BJTs, speciffically Cbc (Cbe is large but not a problem due to very high gm).
G.Kleinschmidt said:
Given that the Rdson of the LMOS is on the order of 0.8 ohms (and that at maximum permissible Vgs!), it may be prudent to include a source resistor of about the same value in the drain of a IRFP240 and see what it does for linearity.
The reason why a LMOS costs $7 is because it is being manufactured by 2 (not sure about the third) manufacturers, and all of them are still based on the very first die made by Hitachi - they still make them, just in a TO3P case rather than TO3. Audio is by far too small now to generate technological advances in this field, which is a pity. Much better laterals could be made even with semi-obsolete processes of today. Meanwhile, pretty much everyone doing discrete semis is making some HEXFET clone, they are bieng churned out by the millions. Hence low price.
As for smaller capacitance, because of less overlap of D and S in the LMOS silicon, only Cgd is signifficantly lower than that of the HEXFET per amp of Id. This should always be remembered because both LMOS, HEX/VMOS, PIMOS, various trench architectures - they are all array semiconductors. You get bigger types by essentially making the array larger. IRFP240 may have over twice the Cgs but it also handles over twice the current. Besides, the actual Cgs is not the end-all: how much of it is effectively being driven, depends on the part's transconductance. This is usually about an order of magnitude larger for HEXFET, at comparable currents. Very handy in a follower, because apparent Cin is decreased.
And that is horrendous? Try this with a BJT...
BTW it is customary for a VMOS to have the tempco inflection point at about the maximum Id, give or take 3dB or so
Honestly, I really don't see a problem with this. I've used non-degenerated HEXFETs (no surce res) and they were pretty much dead stable using a simple Vgs multiplier to generate bias. The latest amp I did this way has about 5% bias drift from 25 to 100 deg C. OK, the gm of a MOSFET is truly small copmared to that of a BJT at comparable currents, but still - I would hardly call this horrendous or difficultto stabilise. Compared to some BJT stages I did, it was dead easy.
I really don't see how this is cause for exasperation? It is routinely done with BJTs for the same reason.
Yes, this is a real issue with HEXFETs driven to the edge, and may result in a form of thermal runaway. However, keep in mind that for the typical IRFP240, we are starting off at 0.18 ohms at 25C, and that it is very difficult to use it in this area in a linear application because you end up violating SOA elsewhere - but that part of the SOA is indeed important for switching applications.
To compare - Laterals start at 0.8 ohms and go up to as much as 1.5 ohms.
That being said, most modern BJTs used for audio power also have resistive losses, and they are not exactly small. Look at the saturation characteristics of say, a 2SC2922 - the clue is not only the rise in Vce at high currents that has a nice linear scaling with current, but also the rise in Vbe to maintain saturation - it goes up to volts! This is because the construction is also an array, with emitter resistors incorporated in the array transistors, which produce a voltage drop. Also, have a look at input capacitances for such BJTs, speciffically Cbc (Cbe is large but not a problem due to very high gm).
Workhorse said:
Kanwar,
yes it's good that you cover up for extremes in your design filosophy, no doubt.
But let me give other comments about the gate charge stuff, it's not that it's "more demanding" for a driver to drive a FET at "high Qg" eg. when we are on the right side on the horizontal scale (high Vgs), the graph just shows the amount of Qg demanded byt the FET if we move between 2 defined Vgs's. so we can extract our self Qg for any 2 points of Vgs change from the graph.
Let me explain further about the Qg stuff, if we would like to change the Vgs just 0,1 V on the left side OR right side of the plateu you will see that Qg merely changes at all which means we need little energy here for a given Vgs change, eg. little drive current.
Now let's be in the plateu region, now again let us change Vgs 0,1 V and the Qg must change dramatically in the horizontal direction for a very small Vgs change in the vertical direction, so that is the toughest region to drive a FET in the linear mode. The slope of the plateu is many many times "steeper" (which is most intuitively unerstood if we turn the picture (I added earlier) 90 degrees clockwise).
Besides I think myself that the capacitance is what we should look at when designing linear stuff with FET's, Qg is for switching purpose would an old SMPS designer say.
It is also the capacitance that kicks in at the plateu.
Hope that gave a new perspective!
Cheers Michael
G.Kleinschmidt said:
Hi Glenn,
You're right. I should not have been so quick to dismiss lateral power MOSFETs. If we are having a discussion of MOSFETs vs BJT's, it is only fair to include within that discussion one of Laeral vs Vertical MOSFETs. Even if it is an old technology, there are people still designing with them and who believe that they sound better. I'll try to come up with some arguments pro and con.
It really did seem that you were suggesting that the higher price of laterals was evidence of their superiority. Sorry if I misinterpreted what you said. There is no reason that they cost more other than that they do not benefit from the high-volume production enjoyed by the verticals. This is a fact of life for lesser-volume devices whether they are obsolete or not. We should discuss the merits of the two types of devices based on their technical merits without regard to price.
Cheers,
Bob
Also, it may be seen as a varicap between driver and load. It may be shunted by resistor for less impact. Resistor may also provide clean zero-crossover current from driver to load, if it's value is small, and a driver is powerful. Also, the current may be provided by biased in class A emitter follower working in parallel with FET... This emitter follower may be degraded such a way with a resistor in emitter so it may supply current up to the region of beta droop, working always in small region of currents defined by Vgs of the FET. I call such couple "Tango", as if FET and BJT emitter followers dance helping each other...
john curl said:
No problems. I find them reliable, cheaper, and available. The
240's and 9240's are best used in big amplifiers as paralleled
followers with a substantial bias.
Bob made a very good point earlier, which is that it is not
necessary when paralleling these devices to scale the bias
current proportionally to avoid crossover distortion. With
regard to charging the Gate-Source capacitance, I would
add that it is also not necessary to assume proprotionately
larger charge current.
G.Kleinschmidt said:
Hi Glenn,
The Vgs temperature dependance of the IRFP 240 asymptotes to about -7 mV/C at very low Id, and is about -6 mV/C in the range of 100 - 200 mA. This compares with about -2.2 mV/C for a bipolar. I know what you mean, it looks pretty bad when you look at the chart at a fixed Vgs and raise the temperature by 125C up to 150C. But this is an overly peesimistic way of looking at it.
Try the same exercise with a bipolar. Hold Vbe constant and raise the temperature by 125C. In very rough terms, that will cause an equivalent Vbe change of 2.2 mV/C times 125C = 275 mV. Since bipolar Ic increases by 10-fold for every 60 mV, we have an effective increase here of over 4 decades, or 10,000:1! Silly, but true by the measure you have chosen. Its not fair, you're right. I hope I have made my point.
The reality is much more complex - more so than I had space to discuss in my old AES paper. The lower gm of the MOSFETs significantly mitigates their 6 mV/C TCvgs and the use of ballast resistors significantly mitigates the bipolar's 2.2 mV/C combined with the bipolar's very high transconductance. In general, I have found MOSFETs easier to bias and more temperature stable than bipolars, but not always by the difference in Sensitivity Factor I showed in my paper.
If you read Section 1.3 of my paper and the results I show, let me know what you think.
In all of these cases, what we have is a thermal positive feedback loop wherin we dearly hope the loop gain always stays well below unity - that would be thermal runaway. We also have at least three distinct and widely different thermal time constants to deal with. In very rough terms, we have the die time constant, measured in milliseconds. We have the package time constant, measured in seconds. And we have the heat sink time constant, measured in minutes.
We also have at least two kinds of thermal bias stability. First, there is passive thermal bias stability. This is how the idle bias in the output stage changes (or does not) when the heat sink temperature is raised or lowered by an external force (not by dissipation of the output stage). This is the easy one. To first approximation, we would like to have the heat-sink-mounted thermal sensor for the bias network keep the idle bias constant so as to achieve very good passive thermal bias stability. We might start at 25 C and raise the heat sink (via a heater or oven) to 60 C, and we will want to see the idle bias remain largely unchanged. We want to do this for either a bipolar stage or a vertical MOSFET stage. This takes care of a very large part of that 6 mV/C TCvgs number.
The second kind of thermal bias stability is active thermal bias stability. Here we look at the idle bias under two conditions. First, stabilized at idle in an ambient room temperature of 25C. Second, immediately after removing 1/3 power into 8 ohms for a prolonged period, at which point the heat sink temperature will have risen to something like 60C as a result of output stage power dissipation. This one will inevitably be less than perfect. The package and junction will be hotter than 60 C as a result of thermal resistance from Junction to case and from Case to heat sink.
The main difference between these two is the presence of the thermal resistance from junction to heat sink. Amplifiers that use paralleled output transistors tend to mitigate the effective value of this thermal resistance and thus make active thermal bias stability not too much worse than passive thermal bias stability.
Finally, you can actually compute the thermal positive feedback loop gain by causing a virtual increase in junction temperature of 1C, then going around the loop, and seeing how much the resulting increase in power dissipation will cause in terms of an equivalent delta Vbe or delta Vgs. You want a result well less than unity. I usually come out with a number less than 0.3 with this exercise.
My 22-amp 20 kHz tone burst test result is relevant to the point you made wherein you suggested that the MOSFEts throttle back at high currents (which is not a power dissipation issue).
Cheers,
Bob
G.Kleinschmidt said:
Glenn, I agree. MOSFETs like to have a decent amount of drive current available for both turn-on and turn-off. In many cases this is less than what a bipolar needs, but it certainly does not obviate the need for adequate buffering between the VAS and the output transistors. I cringe when I see some of those designs that do not properly buffer the VAS.
Bob
Interesting thread...
maximum frequency of operation of a FET given as:-
gm / Cg
The book I'm reading points to the need to look at gm and Idp for geometry and doping level profiles to get the bias dependence of Cg.
What architectures are in use ? (considering the book I have was written in the '60's)
Thanks,
Ash.
maximum frequency of operation of a FET given as:-
gm / Cg
The book I'm reading points to the need to look at gm and Idp for geometry and doping level profiles to get the bias dependence of Cg.
What architectures are in use ? (considering the book I have was written in the '60's)
Thanks,
Ash.
G.Kleinschmidt said:
Yes, Glenn, you've caught me in a generalization that is not always true. I had already pointed out that such a number might not be applicable to a tube amplifier or even a no-NFB amplifier, perhaps due to the detailed nature of the distortions. It is certainly true that there is very benign 0.1% THD-20 and there is very nasty 0.1% THD-20. So if that's the only number I'm given, and it is a solid state amplifier, I'll probably err on the safe side and assume it is a crappy amplifier. But there are exceptions, and John's amplifier appears to be one of them.
Even at 12.5 V into 2 ohms, John is still at only 0.06% at 20 kHz in the Stereophile review. It would have been nice if John Atkinson had done full-power THD-20 and shown us the distortion waveform. But look at the THD-1, where the JC-1 exhibits a nearly pure second harmonic distortion. I'm guessing that, for whatever reason, John's THD-20 would be mostly second and maybe some third. I don't know what in the JC-1 would cause the second.
I'd better be careful here, lest John once again accuse me of second-guessing him
.But you're right - I must be cautious about bandying about THD-20 of 0.1% as bad in the absence of more information.
Cheers,
Bob
ilimzn said:Bob said most of what i intended for me, so here is just the extra on that
Given that the Rdson of the LMOS is on the order of 0.8 ohms (and that at maximum permissible Vgs!), it may be prudent to include a source resistor of about the same value in the drain of a IRFP240 and see what it does for linearity.
The reason why a LMOS costs $7 is because it is being manufactured by 2 (not sure about the third) manufacturers, and all of them are still based on the very first die made by Hitachi - they still make them, just in a TO3P case rather than TO3. Audio is by far too small now to generate technological advances in this field, which is a pity. Much better laterals could be made even with semi-obsolete processes of today. Meanwhile, pretty much everyone doing discrete semis is making some HEXFET clone, they are bieng churned out by the millions. Hence low price.
As for smaller capacitance, because of less overlap of D and S in the LMOS silicon, only Cgd is signifficantly lower than that of the HEXFET per amp of Id. This should always be remembered because both LMOS, HEX/VMOS, PIMOS, various trench architectures - they are all array semiconductors. You get bigger types by essentially making the array larger. IRFP240 may have over twice the Cgs but it also handles over twice the current. Besides, the actual Cgs is not the end-all: how much of it is effectively being driven, depends on the part's transconductance. This is usually about an order of magnitude larger for HEXFET, at comparable currents. Very handy in a follower, because apparent Cin is decreased.
And that is horrendous? Try this with a BJT...
BTW it is customary for a VMOS to have the tempco inflection point at about the maximum Id, give or take 3dB or so
Honestly, I really don't see a problem with this. I've used non-degenerated HEXFETs (no surce res) and they were pretty much dead stable using a simple Vgs multiplier to generate bias. The latest amp I did this way has about 5% bias drift from 25 to 100 deg C. OK, the gm of a MOSFET is truly small copmared to that of a BJT at comparable currents, but still - I would hardly call this horrendous or difficultto stabilise. Compared to some BJT stages I did, it was dead easy.
I really don't see how this is cause for exasperation? It is routinely done with BJTs for the same reason.
Yes, this is a real issue with HEXFETs driven to the edge, and may result in a form of thermal runaway. However, keep in mind that for the typical IRFP240, we are starting off at 0.18 ohms at 25C, and that it is very difficult to use it in this area in a linear application because you end up violating SOA elsewhere - but that part of the SOA is indeed important for switching applications.
To compare - Laterals start at 0.8 ohms and go up to as much as 1.5 ohms.
That being said, most modern BJTs used for audio power also have resistive losses, and they are not exactly small. Look at the saturation characteristics of say, a 2SC2922 - the clue is not only the rise in Vce at high currents that has a nice linear scaling with current, but also the rise in Vbe to maintain saturation - it goes up to volts! This is because the construction is also an array, with emitter resistors incorporated in the array transistors, which produce a voltage drop. Also, have a look at input capacitances for such BJTs, speciffically Cbc (Cbe is large but not a problem due to very high gm).
I agree completely. These are very good points.
Bob
Bob:
The Vgs temperature dependance of the IRFP 240 asymptotes to about -7 mV/C at very low Id, and is about -6 mV/C in the range of 100 - 200 mA. This compares with about -2.2 mV/C for a bipolar. I know what you mean, it looks pretty bad when you look at the chart at a fixed Vgs and raise the temperature by 125C up to 150C. But this is an overly peesimistic way of looking at it.
Try the same exercise with a bipolar. Hold Vbe constant and raise the temperature by 125C. In very rough terms, that will cause an equivalent Vbe change of 2.2 mV/C times 125C = 275 mV. Since bipolar Ic increases by 10-fold for every 60 mV, we have an effective increase here of over 4 decades, or 10,000:1! Silly, but true by the measure you have chosen. Its not fair, you're right. I hope I have made my point.
1) My initial comments on the intrinsic Id temperature stability of HEXFETs were made in relation to that of lateral devices.
2) With regards to the stability HEXFETs with regards to BJT’s I specifically said:
“but looking at the specifications sheets for HEXFETs at low drain currents, it does not appear to me that there is any significant “superiority” of such a device over simple and very easily applied BJT biasing topologies.
Yes, the low gm of HEXFET’s mitigates the temp co to a degree, but without the additional circuity similar to that employed in BJT output stages (bar the ballast resistors) they will neither give matching nor better temperature stability performance.
You claim to have achieved better thermal stability with HEXFETs than with bipolars. I claim that is mostly an academic consideration – how it translates to the effectiveness and complexity with which either type of device can be practically employed in an amplifier output stage with entirely adequate thermal stability is quite another matter.
On this point I stand by my claim that there is little to be generally gained (if any) in terms of temperature stability (with it’s attendant impact on amplifier performance) by choosing HEXFET’s over BJT’s.
Bob:
My 22-amp 20 kHz tone burst test result is relevant to the point you made wherein you suggested that the MOSFEts throttle back at high currents (which is not a power dissipation issue).
That is not what I suggested. I meant high continuous currents for prolonged periods that induce elevated junction temperatures.
The Vgs temperature dependance of the IRFP 240 asymptotes to about -7 mV/C at very low Id, and is about -6 mV/C in the range of 100 - 200 mA. This compares with about -2.2 mV/C for a bipolar. I know what you mean, it looks pretty bad when you look at the chart at a fixed Vgs and raise the temperature by 125C up to 150C. But this is an overly peesimistic way of looking at it.
Try the same exercise with a bipolar. Hold Vbe constant and raise the temperature by 125C. In very rough terms, that will cause an equivalent Vbe change of 2.2 mV/C times 125C = 275 mV. Since bipolar Ic increases by 10-fold for every 60 mV, we have an effective increase here of over 4 decades, or 10,000:1! Silly, but true by the measure you have chosen. Its not fair, you're right. I hope I have made my point.
1) My initial comments on the intrinsic Id temperature stability of HEXFETs were made in relation to that of lateral devices.
2) With regards to the stability HEXFETs with regards to BJT’s I specifically said:
“but looking at the specifications sheets for HEXFETs at low drain currents, it does not appear to me that there is any significant “superiority” of such a device over simple and very easily applied BJT biasing topologies.
Yes, the low gm of HEXFET’s mitigates the temp co to a degree, but without the additional circuity similar to that employed in BJT output stages (bar the ballast resistors) they will neither give matching nor better temperature stability performance.
You claim to have achieved better thermal stability with HEXFETs than with bipolars. I claim that is mostly an academic consideration – how it translates to the effectiveness and complexity with which either type of device can be practically employed in an amplifier output stage with entirely adequate thermal stability is quite another matter.
On this point I stand by my claim that there is little to be generally gained (if any) in terms of temperature stability (with it’s attendant impact on amplifier performance) by choosing HEXFET’s over BJT’s.
Bob:
My 22-amp 20 kHz tone burst test result is relevant to the point you made wherein you suggested that the MOSFEts throttle back at high currents (which is not a power dissipation issue).
That is not what I suggested. I meant high continuous currents for prolonged periods that induce elevated junction temperatures.
abc11 said:
G'day
I disagree a bit.
With class A there is no cross-over distortion and attendant high frequency switching, so the high frequency capabilities of the output devices are no where near as important. Since BJT’s as emitter followers generally have significantly better intrinsic linearity than MOSFET’s do as source followers, I’d always go for BJT’s in a class A design.
If I had to use MOSFET’s, I’d probably look for a lateral device with a nicely linear vgs/Id characteristic over a VFET.
That being said, a very good class A amp could still be made with either lateral or vertical MOSFET's, but BJT's still have an edge in terms of gm and linearity.
Cheers,
Glen