Well the only difference between that circuit and the Hawksford one is the addition of R3. It gives slightly better distortion in the simulations, as well as higher input impedance, but is more difficult to stabilize. It needs Miller compensations around Q4 and Q3, or more degeneration and/or fast BJTs (I haven't built it though).
janneman said:
Luminauw,
The Hawksford EC corrects for any non-linearity in the output stage, that is, at any time the output would deviate from exactly following the input, it is corrected.
Now there are a few limits of course. For one thing, the output stage must be physically able to drive the load to the required level. if not, the EC loop will have a large error output but the output will not be correct.
Secondly, if you look to my figures above, there is an implicit mathematical assumption which is that there is a relation between Vo and Vx through the gain A. That means that when A = 0, all bets are off. So, a class AB will be OK, but if you bias the output stage in such a way that both halves are off at a certain point, A=0 and the EC cannot fix that.
In addition, Hawksford recommends to limit this concept to EF output stages where the gain is already close to 1, so the EC is relatively easy. It took me some time to pick the significance of this up. The reason was, I think, that he had in mind to do the EC with the components that are already present. In his examples, and also as later proposed by Cordell in his EC mosfet amp, they use the transistors for the bias setting to double as EC amplifiers! This is extremely smart, and from an engineering point most creative: Use the same components, but get a totally different - and much improved - result. There are some VERY clever people out there!
But, in theory, there is nothing to stop you designing an EC stage enclosing a stage with a gain other than 1. You just have to make sure that the additional requirements to output a correction signal are taken care of by the EC loop. The two bias transistors are then no longer able to take care of it. As shown in my two figures posted above, the math is extremely simple and elegant. Hawksford paper is more difficult to read, but he got paid for it I guess...
Jan Didden
Edit: see attached for a gain of 2 EC stage.
Jan,
Your schematic appears misleading. The opamp around OP stage
must satisfy condition that - IP always follows + IP. I don't see
how this is possible in this circuit. What don't I get?
Cheers,
Terry
How about this?
I draw this and expect to be able to do EC (with my limited knowledge). Does it works EC?
The idea comes from a "little" drawback that Hawksford EC has, that it always needs a resistor in the collector (R1), that makes inefficient rail use.
In this idea, the EC is driven by CCS up and down, and the signal is injected to the middle (in the emitors of VBE multiplier). The feedback from output comes to bases of VBE multiplier.
I draw this and expect to be able to do EC (with my limited knowledge). Does it works EC?
The idea comes from a "little" drawback that Hawksford EC has, that it always needs a resistor in the collector (R1), that makes inefficient rail use.
In this idea, the EC is driven by CCS up and down, and the signal is injected to the middle (in the emitors of VBE multiplier). The feedback from output comes to bases of VBE multiplier.
Attachments
If you make the split supplies to the opamp referenced to the output transistor emitters instead of to ground then the opamp only has to swing the error voltage, not the entire drive signal amplitude. Can sometimes be a stability problem though, depending on the opamp.sss said:
Beware! Many, if not most simulators assume opamp supply rails are referenced to ground and so won't let you do this type of simulation. 
Re: How about this?
Lumanauw,
The signal from the output should go to the emitters of T1,2, so you get an error current into the emitter representing the error voltage, and (almost) the same current out of the collector. The input voltage should go to the bases. Then you need to replace the current sources with same value resistors as the error input, so you get a 1:1 error correction voltage. What you have drawn will most probably work, but it is not Hawksford EC, it is local feedback around the output stage. The drawback you mentioned, the resistor in the collector lead, is the essential element of the Hawksford EC. (Can we call that HEC from now on to savve typing time?).
Jan Didden
lumanauw said:
Lumanauw,
The signal from the output should go to the emitters of T1,2, so you get an error current into the emitter representing the error voltage, and (almost) the same current out of the collector. The input voltage should go to the bases. Then you need to replace the current sources with same value resistors as the error input, so you get a 1:1 error correction voltage. What you have drawn will most probably work, but it is not Hawksford EC, it is local feedback around the output stage. The drawback you mentioned, the resistor in the collector lead, is the essential element of the Hawksford EC. (Can we call that HEC from now on to savve typing time?).
Jan Didden
Re: How about this?
The same in the op-amp version; the corresponding resistor can be removed entirely because it's currents that are being summed at the input, not voltages.
Hmmm, it does have an effect. If the output is lower than the input then the current through the top feedback resistor increases, thus increasing the voltage from the top half of the Vbe multiplier, increasing the output to compensate, and vice-versa. It should reduce distortion and output impedance. Try it and see how much difference it makes.lumanauw said:
It's not the 'locality' of it so much as the speed. A fast op-amp can be just as fast as discrete cicuitry. The HEC circuits are basically two-stage op-amps around the output stage, so an IC op-amp isn't that much different. It does give better distortion and output impedance than normal NFB, so that's the benefit.darkfenriz said:
You're right, it is better to remove R3. I made a mistake in my above comment too: It's not the addition of R3 which is the important change, it's the moving of the EC amp's input to the other side of the input resistor.Steven said:
The same in the op-amp version; the corresponding resistor can be removed entirely because it's currents that are being summed at the input, not voltages.
Sorry, I forgot one line between the first and second transistor of lower of triple darlington.
In the cct I draw, I assume the voltage between B and E of T1 and T2 is always 0.6V. This assumes the distance between B-B of T1 and T2 is 1V2.
Lets say, the CCS is 15mA. Lets look at the top arrangement first. From this 15mA, I assume 10mA goes to VBE multiplier, and 5mA goes to the next stage. (This happens in equilibrum state).
If a positive signal is going into this cct, then it has to go to the junction of E-E of T1 and T2. This positive signal will make a slight imbalance (at the same time injects current INTO this E-E), lets say VBE T1=0V55 and VBE T2=0V65 (the total still 1V2).
This will make the current that can pass thru T1 will decrease from the equilibrum (no signal) state. Lets say in VBE=0V6, T1 can pass 10mA (neglecting the current passing in resistors and bases).
Incondition of VBE=0V55, T1 only can pass 8mA. The CCS still gives the same amount of current 15mA, while current that can pass thru T1 is only 8mA.
So, another 2mA (total now = 7mA, originally only 5mA) will be going to the next stage, making the output positive. (this 2mA difference is amplified by the triple darlington).
Now, how about the T2?
Assume the input voltage that makes VBE imbalance of 0V55(T1) and 0V65(T2), at the same time injecting 4mA.
This makes the VBE of T1=0V55 (making T1 only can pass 8mA from original condition of 10mA).
Now the VBE of T2 is 0V65. Assume this VBE=0V65, the current that can pass here is 12mA. That fits all the equation, 8mA is given by T1 and 4mA is given by outside signal. This makes total goes to T2=12mA.
Because the lower CCS is the same as upper CCS = 15mA, the current that is given to the next stage by lower section now decreases, from 5mA in equilibrum, now only 3mA. (because 12mA is already supplied by T2). This shifts the lower output more positively, following what happens in the upper output stage (sadly, no Blomley here).
How does EC works? Lets assume the output is too big from the input. If the output is too positive than the input, because output is connected to base, then VBE of T1 wil rise (say 0V65 now, from 0V6 than it should be). In the condition of VBE=0V65, T1 will pass more current, making less current goes thru the next stage---->making lower output.
This can happen because at all condition the CCS gives the same current. The sharing between current goes to VBE multiplier and current goes to next stage is making EC.
If the output (connected to base) is less voltage than input (connected to emitor), then the VBE of T1 will reduce, say 0V55. This makes the current that can pass thru T1 now less than equilibrum. This means automaticly more current will be given to the next stage (this is also because CCS still gives the same amount).
This will happened again and again, until input is the same voltage as output. This means this CCT will hold input will always equal to output.
So this CCT can do EC?
In the cct I draw, I assume the voltage between B and E of T1 and T2 is always 0.6V. This assumes the distance between B-B of T1 and T2 is 1V2.
Lets say, the CCS is 15mA. Lets look at the top arrangement first. From this 15mA, I assume 10mA goes to VBE multiplier, and 5mA goes to the next stage. (This happens in equilibrum state).
If a positive signal is going into this cct, then it has to go to the junction of E-E of T1 and T2. This positive signal will make a slight imbalance (at the same time injects current INTO this E-E), lets say VBE T1=0V55 and VBE T2=0V65 (the total still 1V2).
This will make the current that can pass thru T1 will decrease from the equilibrum (no signal) state. Lets say in VBE=0V6, T1 can pass 10mA (neglecting the current passing in resistors and bases).
Incondition of VBE=0V55, T1 only can pass 8mA. The CCS still gives the same amount of current 15mA, while current that can pass thru T1 is only 8mA.
So, another 2mA (total now = 7mA, originally only 5mA) will be going to the next stage, making the output positive. (this 2mA difference is amplified by the triple darlington).
Now, how about the T2?
Assume the input voltage that makes VBE imbalance of 0V55(T1) and 0V65(T2), at the same time injecting 4mA.
This makes the VBE of T1=0V55 (making T1 only can pass 8mA from original condition of 10mA).
Now the VBE of T2 is 0V65. Assume this VBE=0V65, the current that can pass here is 12mA. That fits all the equation, 8mA is given by T1 and 4mA is given by outside signal. This makes total goes to T2=12mA.
Because the lower CCS is the same as upper CCS = 15mA, the current that is given to the next stage by lower section now decreases, from 5mA in equilibrum, now only 3mA. (because 12mA is already supplied by T2). This shifts the lower output more positively, following what happens in the upper output stage (sadly, no Blomley here).
How does EC works? Lets assume the output is too big from the input. If the output is too positive than the input, because output is connected to base, then VBE of T1 wil rise (say 0V65 now, from 0V6 than it should be). In the condition of VBE=0V65, T1 will pass more current, making less current goes thru the next stage---->making lower output.
This can happen because at all condition the CCS gives the same current. The sharing between current goes to VBE multiplier and current goes to next stage is making EC.
If the output (connected to base) is less voltage than input (connected to emitor), then the VBE of T1 will reduce, say 0V55. This makes the current that can pass thru T1 now less than equilibrum. This means automaticly more current will be given to the next stage (this is also because CCS still gives the same amount).
This will happened again and again, until input is the same voltage as output. This means this CCT will hold input will always equal to output.
So this CCT can do EC?
lumanauw said:
Lumanauw,
I think we have a semantic problem here. This circuit "can do EC" in the sense that it reduces the non-linearity of the output stage. What you describe is more or less a standard negative feedback loop, applied over the output stage.
However, HEC is a very specific type of feedback loop, that EXACTLY nulls the non-linearity, PROVIDED the feedback is exactly one (which in practise of course it never is).
In your circuit, there is always a remaining small part of the non-linearity, because as you said, there MUST be a small error to be able to correct it etcetera. In your case, the nulling will be exact only is the feedback loop gain is infinite, which also in practise it never is.
The nice thing about HEC is that it is easier to make a gain-of-1 loop, without any stability problems, then a gain-of-infinite loop, with all the problems of stability and a few others that would give.
Jan Didden
Terry Demol said:
Terry,
Sorry I picked this up so late. That is not an opamp in the sense you use it. It is an amplifier with a gain of 1, as shown in the diagram. The output is the difference of the inputs.
I used a standard symbol for a gain block, but I realise that many here came to associate the symbol with a standard hi-gain opamp.
Of course, inside my gain-of-1 block there MAY be a standard opamp with necessary circuit elements to make a gain-of-1 block. I don't know, I didn't look.
Jan Didden
I've been playing around with the circuit a bit, and it seems that I've been overly worried about keeping the amount of EC reasonable to maintain stability.
Removing all feedback around the error amp can yield perfect stability as long as the output stage itself shows well damped frequency response. I was sceptical of the sims at first, but the attached circuit does actually work, and better than the original. It even works with normal speed op-amps, so I think when I get around to building a proper one I will use OPA445 so I can have higher voltage rails (up to +/-45V).
It's also interesting to see what happens as the value of the input resistor (R7) is varied. When it's infinite there is no EC, only normal NFB and distortion is at one maximum. As it's reduced, so distortion reduces until a minimum at approximately the value shown. Then as it's decreased further, so distortion increases again to a maximum when the resistor is zero, shorting out the EC entirely.
I suggest you get yourself over to the Spice page and find youself a free simulator.
However, not having a simulator is no excuse: Use a breadboard! I think it's best to use both, since both can reveal things that the other can't.
Removing all feedback around the error amp can yield perfect stability as long as the output stage itself shows well damped frequency response. I was sceptical of the sims at first, but the attached circuit does actually work, and better than the original. It even works with normal speed op-amps, so I think when I get around to building a proper one I will use OPA445 so I can have higher voltage rails (up to +/-45V).
It's also interesting to see what happens as the value of the input resistor (R7) is varied. When it's infinite there is no EC, only normal NFB and distortion is at one maximum. As it's reduced, so distortion reduces until a minimum at approximately the value shown. Then as it's decreased further, so distortion increases again to a maximum when the resistor is zero, shorting out the EC entirely.
Can't run a sim?!lumanauw said:
I suggest you get yourself over to the Spice page and find youself a free simulator.However, not having a simulator is no excuse: Use a breadboard! I think it's best to use both, since both can reveal things that the other can't.
Attachments
It becomes clearer to me. Imagine the attached schematic is made with abstract ampifying blocks like janneman's nice diagrams. By varying the values of R1, 2 and 3 and the gain of X2, a continuous range of combinations of EC (HEC included) and normal NFB are possible. The schematic from the previous post is virtually normal NFB, which isn't really what I set out to do.
Attachments
janneman said:
Terry,
Sorry I picked this up so late. That is not an opamp in the sense you use it. It is an amplifier with a gain of 1, as shown in the diagram. The output is the difference of the inputs.
I used a standard symbol for a gain block, but I realise that many here came to associate the symbol with a standard hi-gain opamp.
Of course, inside my gain-of-1 block there MAY be a standard opamp with necessary circuit elements to make a gain-of-1 block. I don't know, I didn't look.
Jan Didden
Jan,
I kind of worked this out (doh) a day or so after posting, thanks
for the clarification.
Cheers,
Terry
lumanauw said:Hi, Terry Demol,
I know I have big chance of making wrong analysis, because it comes from Analog Simulator (my thinking)
I cannot run a Sim. Which part is false?
Yes, using the "mind simulator" there are many ways to look
at how a given circuit works.
There are a few different ways to look at this circuit but the
simplest is that the VBE multiplier has feedback which reduces
it's effective error correction gain. That gain is the ratio of the
base resistors to base+collector resistors. Since they are
proportional to 1 x 0.7V and 2 x 0.7V then I get 3.
Cheers,
Terry
Hi, Terry Demol,
When I draw this CCT, is based on patent no. 3,995,228 by Nelson Pass. If you read this patent, you will find that this "VBE multiplier" is not ordinary VBE multiplier, because it will not hold exact drop on top-bottom output. It can "slide" the value of Voltage on top-bottom, because at bases of VBE multiplier (2 of them) there is an "escape" route for base current to other point (to output line in this case). This will make the output voltage will not be constant, like ordinary VBE multiplier without "escape route" for base current.
If we look totally at HEC, all energy that drives the driver comes from VAS. In my drawing, the energy have other sources, that is from CCS. Maybe this can help make the VAS sees "lighter" load? Again this comes from Analog Simulator, big chance of wrong.
When I draw this CCT, is based on patent no. 3,995,228 by Nelson Pass. If you read this patent, you will find that this "VBE multiplier" is not ordinary VBE multiplier, because it will not hold exact drop on top-bottom output. It can "slide" the value of Voltage on top-bottom, because at bases of VBE multiplier (2 of them) there is an "escape" route for base current to other point (to output line in this case). This will make the output voltage will not be constant, like ordinary VBE multiplier without "escape route" for base current.
If we look totally at HEC, all energy that drives the driver comes from VAS. In my drawing, the energy have other sources, that is from CCS. Maybe this can help make the VAS sees "lighter" load? Again this comes from Analog Simulator, big chance of wrong.
AKSA said:
Gedday Hugh
Yes, 3 is probably hardly worth the effort.
I'm interested to hear from people here who have implemented
some sort of OP EC (local to the OP and unity gain) and what
its effect was to sonics. We all know that distortion is lowered
but what are the sonic traits??
Cheers,
Terry
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