Amplifier topology subjective effects

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Capslock,

I build some different type amplifiers, with different topologies. There was some project, with cascode input, and/or cascode VAS stages. But I was not really happy with the sound of them.
My last cascode design used BC546B/556B as input devices, with same for cascode. I used 100ohm series resitors at the base. I checked the output with 400MHz Le'Croy digital scope, and I used the calibrating square wave to drive the amplifier.
So my current project contains no cascode stages. I agreed, that the cascode transistor means very heavy load for the lower device, and it results high distortion. Another thing is the thermal distortion, which is allways problem with cascode desing.

I think that resistive load is a good thing! I use them for the input stage, and for the VAS too. This resistor helps to stabilize the open loop gain, if the input impedance of the ouput stage is much higher (triple emitter follower). Of course I use emitter degeneration too. The local feedback is better than the overall.
I don't use Miller capacitor to push down the pole frequeny of the VAS stage. I use simple R-C filter between the input and the VAS stage.

But -of course- this is only one point of view...

Sajti
 
more on my little circuit

Distortion minutae are Subtle and Sensitive, simply stiffening up D1’s voltage offset with a 1000uF parallel cap drops 2KHz 2nd harmonic to –150.5 dB and raises 3rd to –149.8 dB, odd distortion is now higher (barely) than even – is this a “symmetric topology” now? It is clear that a properly working input cascode can reduce distortion, but is 5x less 2nd worth doubling 3rd? How about when both are already below the threshold of hearing?

All the simulation in world certainly can’t answer the question about subjective effects, distortion variations at these levels certainly aren’t expected to be audibly perceptible. Implementation details and unexamined differences such as PSSR and EMI sensitivity of different topologies and implementations are calculably larger.

So why am I bothering? It’s because pursuing ultra low distortion is a Disease! “…my name is john, I have a problem, I design low distortion amplifiers…”

Fellow suffers can find the good stuff in:

Cherry’s “ESTIMATES OF NONLINEAR DISTORTION IN FEEDBACK AMPLIFIERS” JAES V48#4 2000 p299-313 is perhaps his most useful but he was certainly busy in the ‘80s in JAES showing the application of Bode’s Sensitivity analysis (Bode’s book is online! http://auditorymodels.org/jba/BOOKS_Historical/ ) to audio amplifier design, “IRONING OUT DISTORTION” in Electronics World + Wireless World (1/95, and 7/97 issues) gives a lighter summary of many of his recommendations.

Lynx’ products are insanely good for ~$1K pc sound cards – I haven’t looked recently, a USB analyzer from them would be great
http://www.lynxstudio.com/index.html
 
sajti:

>Of course we checked the amplifier with square wave, and various loads.<

I would look at the input stage by itself, with and without the cascode. In every case that I have used input bootstrap cascodes, I have found the benefits to far outweigh the extra complexity, and I haven't noticed any performance penalties either (other than the lurking propensity for oscillation noted previously).

But then, I'm not you. At the end of the day, if you can't get the cascode to work to your satisfaction, it is better to go with something that does what you want it to.

>Another thing is the thermal distortion, which is always problem with cascode desing.<

If anything, the reverse should be true, since the bootstrap cascode means that the input device will always see constant voltage operating conditions, no matter what it does.

hth, jonathan carr
 
Disabled Account
Joined 2002
cascode not entirely fool proof

jcarr said:
sajti:

Place the driving voltage source as close to the base of the cascode transistor as possible, and if any significant free lead length remains (signifying inductance), add a base stopper resistor(s).
jonathan carr

Such a base-stopper resistor must not exceed ~20R...anything larger will likely generate complex poles at the cascode collector, making the whole tediously unstable. This is particularly the case if the effective impedance at said collector is large, (~100K+).
 
jcarr said:

In every case that I have used input bootstrap cascodes, I have found the benefits to far outweigh the extra complexity, and I haven't noticed any performance penalties either (other than the lurking propensity for oscillation noted previously).

Have you a cct segment you could show. I am not familiar with a bootstrap cascode and I would be interested as to what load it was driving typically

mike
 
SAY WHAT?

The guy ask for a bootstrap current source and you give him a common base low impedance photo diode amp circuit?

THIS IS NOT HELPING.............

Please this man is asking for a decent simple cascode current source. Is there an Engineer in the house?

Oh...... wait a minute, I used to be an engineer.
 

Attachments

  • the fet constant-current source limiter.zip
    47.4 KB · Views: 253
Hi Fred:

>Please this man is asking for a decent simple cascode current source.<

He was? :eek: I thought that he wanted to learn the theory of bootstrapping an input stage. If it is just a current source, no need to bootstrap - a fixed-voltage cascode will do fine.

>THIS IS NOT HELPING.............<

:D Sorry, but I can't help laughing. ROTFLMAO! You're right, I screwed up.

Cheers, jonathan carr
 
(ahem, cough, cough)

might i point to my ciircuit in post #149 in this thread (that puts in page 10) as an example of a bootstrapped cascode input stage?

first pass i saw about 6 db distortion reduction, on closer examination of input currents at Q1/2 i found that D1 varying impedance was limiting the accuracy of the R19/20 divider in dynamicaly following the common mode voltage of the input, limiting the bootstrap effectiveness of Q12/13 cascode Qs

as mentioned on the previous page, AC shorting D1 with a big C matches Q12/13 bias to follow input common mode within a few mV giving a further input cascode distortion reduction by about 14 dB for a total distortion reduction in my circuit of ~ 20 dB: to -150 dB!
 
jcx,

I overlooked the bootstrapping on first sight. It's a very elegant solution, minimal parts count!

On the other hand, the DC operating point will vary almost the same as the rail voltage (assuming V(D1) << V_rail), so power supply rejection might be poor. Replacing D1 with a CCS, using a resistor from CCS collector to ground and stabilizing this voltage with a big cap, on the other hand, should not degrade PSR.

Also, taking the bootstrap from the output minimizes parts count, but might introduce stability issues because there is a fair amount of lag introduced by VAS and output transistors. Would buffering the common emitter point of the LTP with an emitter or source follower work? In this case, with have the extra capacitance and a little load to deal with...


By the way, I would really appreciate it if you could try to elaborate on the last paragraph of your post on distortion residuals. It really sounds interesting, but I had trouble following your explanations.

Regards,

Eric
 
I will try to explain:

I read a very long discussion about thermal distortion, in one of our electronical newspaper, here in Hungary.
The results:
- the chip temperature of the low power transistors, such as BC series, can follow the dissipation changes up to 10kHz
- the distortion is not affected by the DC dissipation (bias current), only by the signal
- there is no possibility to keep the dissipation constant with input signal
- in this case: try to adjust the changes into same way

The last fact is the most important for me. This is possible if I use only all stages with accordant connection.
This means that the dissipation of the stage is maximum without signal, and if I apply signal, the dissipation will decrease.
This is very important at the input stage, because every distortion, noise etc. generated in this stage will be amplified by the VAS.
In my amplifier the gain of the input stage is about 2. Most of the gain provided by the VAS (275).

So in practice: I set the collector voltage of my input LTP to the half of the PSU voltage. To realize this I simply add one series resistor between the output of the input stage, and the collector of the transistors. I use +/-40V, so my input stage run with Vce=20V, and Ic=2mA.

I hope it was clear
Sajti
 
Sajti,

I have thought about your post a little, and it seems you have a point! There are three ways the power dissipation can change:

1) The + input transistor follows the input signal (let's look at a positive half wave) which decreases the voltage drop over the transistor. The - input transistor does the same thing. Hopefully, the thermal constants are similar, because then this cancels.

2) The + transistor conducts more current - this increases dissipation.

3) The collector voltage of the + transistor will move down. How much depends both on the current change, what kind of a collector load you are using and whether your VAS is current drive or almost voltage drive, i.e. using heavy degeneration. In your case, you have included a large extra resistor of approximately 18V/2mA=9 kOhms (assuming the VAS base sits 2 V below the rail), so the voltage will move quite a bit.


Your transistor will dissipate roughly 41.3 mW=20.65 V*2mA.
Now, let's assume the input signal causes 0.1 mA signal current to flow. Also, assuming the VAS input is predominantly current mode, it will not move a great deal. Furthermore, we will ignore 1) because we are hoping for cancellation. The collector voltage will then drop by 0.1 mA*9k=0.9V. The dissipation is up by 0.175mW: 19.75V*2.1mA=41.475mW.

This can be further reduced by selecting a larger resistor. For 9.85k we get a change of -0.0035 mW.

For comparison, let's assume we use a cascode that makes the input transistors run at 5 V CE. Their dissipation is 5V*2 mA=10 mW. The 0.1 mA signal current will cause a change in dissipation by 0.5 mW which is not much but definitely 1000x times more than what can be achieved by careful selection of the resistor.

The price you are paying is increased Early voltage nonlinearity. One would have to know the heat capacitance of the piece of silicon + plastic that is relevant at audio frequencies to compute the temperature change and hence the change in V_BE to see which of the two effects is prevalent.

Using a dual transistor like the 2SA1349 might actually obviate the need to consider thermal distortion if the coupling is quick enough.


Are you sure your input stage has a gain of only 2? This statement makes sense only if you have heavy VAS degeneration. Otherwise, you might be seeing 2x the input voltage at the input transistor collector, but the current transfer function would remain basically the same, with resistor or without (except for the Early effect).

Do a search for "peufeu" and "thermal distortion". He has a long article on thermal distortion on his homepage. I believe I have seen the resistor trick there, too.




Regards,

Eric
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.